Many of the QorIQ processors have CPC (L3 CoreNet platform cache), such as P2040, P3041, P4080, B4860 and T1040 etc. CPC is a CoreNet-compliant target device. It could also be configured as memory-mapped SRAM, or combination of cache and SRAM. Here describe how to configure CPC to be SRAM.

T2080PCIe_RDB SPI reboot failure problem

This is a QorIQ T1040RDB and T2080RDB SDK1.7 IPv6 +AES test guide.

QorIQ Device Virtualization with KVM: Performance vs Flexibility

More and more customers are using the Freescale Linux SDK/BSP for customized development, however, some use a stable but old kernel version. This is different from the Freescale publicly released SDK. In order to manage the gap and help apply the Freescale SDK/BSP more efficiently, Freescale provides backported Linux SDK/BSP according to the customer's kernel version requirements. This lecture summarizes the strategy and key technology of the backport, introduces the latest proactive backport model based on git release and will help expedite product development using Freescale Linux releases.

This document explains how to burn into target flash the binary files needed to boot the target board with u-boot and/or Linux from a released Digital Networking SDK. Start by identifying the SDK from which to extract the u-boot and Linux binaries.  SDK (and other BSP) files are archived here: http://linux.freescale.net/labDownload2/viewDownloads.php Enter "SDK" as your Filter Text to see only the SDK files. Pick the SDK that you want, and note the .iso files with -IMAGE- in the filenames, organized by processor cores.  For example, T4240 uses the e6500 core, so the IMAGE file with 64-bit binaries from SDK 1.7 would be QorIQ-SDK-V1.7-PPC64E6500-IMAGE-20141218-yocto.iso.  T1040 would use QorIQ-SDK-V1.7-PPCE5500-IMAGE-20141218-yocto.iso for 32-bit binaries, P1010 would use QorIQ-SDK-V1.7-PPCE500V2-IMAGE-20141218-yocto.iso, and so on.  Click on the -IMAGE- file you want and open it as a WinZIP file. The contents of each -IMAGE- .iso file are organized by specific target boards, so expand the WinZIP folder for the board you're using and you'll see the full list of all the files generated by that SDK for your board.  For example, 1.7 SDK for P2020-RDB (E500V2) would look like this: Next, refer to the Infocenter Boards page for details on what files need to go where. Expand the link for your board and click on the Flash Bank Usage link for the board you're using for board-specific details. Finally, refer to the Infocenter's System Recovery chapter for instructions on how to do the flash programming.  The two methods described are: use u-boot to download and program each file; or use the CodeWarrior Flash Programmer to do the same.  Both methods work, so use whichever method is easier. ALTERNATIVE: If you want a fully-loaded Linux system on your target board but you'd rather not have to individually flash a half-dozen files (while perhaps getting one or more of them wrong), most boards have complete, composite binary files in their -IMAGE- .iso archives.  Look in your mounted .iso file for the flash-image folder and you should see a list of files that look similar to this: Each of these _NOR_Flash.bin files includes everything from the RCW to the Linux kernel for the boards noted in their file names.  Program each file to the beginning address of the noted flash type (NAND, NOR, etc.) For example, on T4240-QDS, the beginning address of NOR is 0xE8000000, so program QorIQ_SDK_V1.7_T4240QDS-64B_20141218_NOR_Flash.bin to 0xE8000000. The advantage of this method is that you don't have to program multiple binary files, perhaps picking the wrong file or programming it to the wrong address.  The primary disadvantage is that this method takes a looooooong time since these _Flash.bin files are so large.  Also, you don't get to customize the configuration until after the file has been flashed and the board is up and running.

IPSec Performance Reproducibility Procedure on T1040RDB platform 1. Enable ASF in Linux Kernel           Step 1: Launch the kernel menu using the command: bitbake -c menuconfig virtual/kernel      Step 2: Enable ASF under Device Driver -> Networking device support -> Application Specific Fastpath      Step 3: Build the final binaries that needs to be loaded on T1040RDB using the command : bitbake fsl-image-core NOTE: The ASF modules are compiled as dynamically loadable modules and placed in the ROOTFS under the path /usr/driver/asf/min and /usr/driver/asf/full 2. Steps to boot the board with 2 cores:  (optional) => cpu 2 disable => cpu 3 disable => boot Board configuration after Linux is up A. Enable ip_forwarding and Linux performance parameters echo 1 > /proc/sys/net/ipv4/ip_forward echo 9000 > /proc/sys/net/netfilter/nf_conntrack_udp_timeout echo 9000 >/proc/sys/net/netfilter/nf_conntrack_udp_timeout_stream B. Insmod ASF ko’s cd /usr/driver/asf/min insmod asf.ko insmod asfctrl.ko insmod asfipsec.ko insmod asfctrl_ipsec.ko C. Run fmc command : cd /usr/driver/asf/scripts/fmc/ fmc -s Soft_FragParser.xml -p asf-fman-perf-policy.xml -c asf-cfg-perf-2041.xml -a D. Assign interface IP addresses and routes according to setup. Left DUT: ifconfig fm1-gb0 172.18.18.10 netmask 255.255.0.0 up ifconfig fm1-gb3 200.200.200.10/24 up ifconfig fm1-gb1 172.20.20.10 netmask 255.255.0.0 up ifconfig fm1-gb4 20.20.20.10/24 up route add -net 192.168.1.0/24 gw 172.18.18.2 route add default gw 200.200.200.20 route add -net 172.168.1.0/24 gw 172.20.20.2 route add -net 172.168.2.0/24 gw 20.20.20.20 arp -s 172.18.18.2 00:00:00:00:00:01 (optional) arp -s 172.20.20.2 00:00:00:00:00:02 (optional) Right DUT: ifconfig fm1-gb0 172.19.19.10 netmask 255.255.0.0 up ifconfig fm1-gb3 200.200.200.20/24 up ifconfig fm1-gb1 172.21.21.10 netmask 255.255.0.0 up ifconfig fm1-gb4 20.20.20.20/24 up route add -net 192.168.2.0/24 gw 172.19.19.2 route add default gw 200.200.200.10 route add -net 172.168.2.0/24 gw 172.21.21.2 route add -net 172.168.1.0/24 gw 20.20.20.10 arp -s 172.19.19.2 00:00:00:00:00:02 (optional) arp -s 172.21.21.2 00:00:00:00:00:04 (optional) E. Configure IPSec policies and SAs (attached below that needs to be downloaded to the box via tftp or sftp) Left DUT: ./left_tun-4port-v1.txt Right DUT: ./right_tun-4port-v1.txt F. Switch settings killall -9 l2sw_bin l2sw_bin Using UIO: /dev/uio0 Mapped register memory @ 0xb7b3f000 Chipid: 099530e9 fsl_dpa ethernet.17 fm1-gb0: Err FD status = 0x00040000 fsl_dpa ethernet.18 fm1-gb1: Err FD status = 0x00040000 l2switch> l2switch>mac add 00:00:00:00:00:01 3 [MAC 00:00...00:01 is reachable on port 3] m2switch>mac add 00:00:00:00:00:03 7 l2switch>mac add 00:04:9f:03:30:f6 8 [MAC of fm1-gb0] l2switch>mac add 00:04:9f:03:30:f7 9 [MAC of fm1-gb1] l2switch>mac dump [Displays MACDB of switch (static & Dynamic)] Type VID MAC Address Ports ------ --- ----------------- ----- Static 1 00:00:00:00:00:01 3 Static 1 00:00:00:00:00:03 7 Static 1 00:04:9f:03:30:f6 8 Static 1 00:04:9f:03:30:f7 9 Static entries: 4 Dynamic entries: 0 l2switch> l2switch>^Z [Press ctrl+z to stop the process] [1]+ Stopped(SIGTSTP) l2sw_bin root@t1040rdb:/mnt/sridhar/asf-bins/qos/bin/full# killall -9 l2sw_bin G. Configure IXIA/STC to generate the traffic with 128 flows. H. Start the traffic from both end and verify all the flows are offloaded and packet is going through IPSec ASF. Note: Except switch settings everything is similar to previous performance releases by IDC. I. The ASF flow can be observed using the following command cat /proc/asf/flow_debug Script files PFA in attachment

Hypervisor Deployment The Freescale embedded hypervisor is a layer of software that enables the efficient and secure partitioning of a multicore system. A system's CPUs, memory, and I/O devices can be divided into groupings or partitions, as shown in the figure below. Each partition is capable of executing a guest operating system. Figure 1. Partitioning with the Hypervisor in a Multicore Environment Hypervisor DTB changes: The partitioning information is defined in hypervisor package file called hv.dts. By default, the hv.dts file has only 2 interfaces and a mac-less interface defined per partition.  For IPSec demo we need to place all the interfaces within the 1st partition and the attached file has the full source code details. To extract the HV DTB source code, use the bitbake command: bitbake -c patch hv-cfg Build the final binaries using the bitbake command: bitbake fsl-image-core The above command would compile all the binaries required (including hv-2p-lnx-lnx.dtb) Now, the kernel, hypervisor image, device tree, hypervisor device tree and ramdisk filesystem can be flashed onto the board. These steps should be done assuming the user already has switched to the alternate bank.             Step 1: Programming Kernel to Flash TFTP the kernel image to RAM, then copy it to the flash address 0xe8020000. Execute the following commands at the U-Boot prompt to program the kernel to flash: =>tftp 1000000 uImage-t1040rdb.bin =>erase e8020000 +$filesize =>cp.b 1000000 e8020000 $filesize Step 2: Programming Ramdisk Filesystem to Flash TFTP the ramdisk file system to RAM, then copy it to the flash at address 0xe9300000. Execute the following commands at U-Boot prompt to program the ramdisk to flash: =>tftp 1000000 fsl-image-core-t1040rdb.ext2.gz.u-boot =>erase e9300000 +$filesize =>cp.b 1000000 e9300000 $filesize Step 3: Programming Hypervisor Image to Flash TFTP the hypervisor images to RAM, then copy it to the flash at address 0xe8700000. Execute the following commands at U-Boot prompt to program the hypervisor image to flash: =>tftp 1000000 hv.uImage =>erase e8700000 +$filesize =>cp.b 1000000 e8700000 $filesize Step 4: Programming Kernel dtb to Flash TFTP the kernel dtb file to ram, then copy it to the flash at address 0xe8800000. Execute the following commands at U-Boot prompt to program the kernel dtb to flash: Target Deployment - for hv-2p mode deployment: =>tftp 1000000 uImage-t1040rdb.dtb =>erase e8800000 +$filesize =>cp.b 1000000 e8800000 $filesize Program "hv-2p-lnx-lnx.dtb" to 0xe8900000 =>tftp 1000000 hv-2p-lnx-lnx.dtb =>erase e8900000 +$filesize =>cp.b 1000000 e8900000 $filesize           Step 5: Booting Up the System As of now, all the DPAA devices on this platform are given to partition 1. The kernel can boot up automatically after the board is powered on with the correct U-Boot environment. The following command can also be used to boot up the board at U-Boot prompt: =>setenv bootargs config-addr=0xfe8900000 console=ttyS0,115200 =>setenv bootcmd 'bootm 0xfe8700000 - 0xfe8800000' =>saveenv =>boot Step 6: Setup IPSec demo as described in the following link IPSec demo on T1040RDB

Open source software development tools for ARM processors

CodeWarrior Development Suite for Networking Applications to support software development on QorIQ Layerscape devices.

This presentation starts by giving  introduction to SDN (Software Defined Networking) and NFV (Network Function Virtualization) technology.  It provides overview of performance challenges and how Freescale hardware & software solutions help in mitigating the performance challenges.

The flow is on sector 3.4.20.10.4 in QorIQ-SDK-1_7-IC-RevA, but it is wrong. So, please follow the steps in the attachment.

T2080 rev1.1 has fixed the MEM_PLL_RAT issue. but, the set flow is different than T2080 rev1.0. The flow is in the attached doc.

QorIQ is a important contributor to the Internet of Things with devices such as the LS1 Gateway.  Read more about the Internet of Things! Freescale Expands System Power Management Portfolio to Its QorIQ LS1 Processors for a Secure Internet of Things

The NCSW - NetComm Software - is a package to help speed development on Freescale PowerQUICC and QorIQ processor platforms. It contains NCDD - NetComm Device Drivers - and some other components. Here take P3041 I2C supported in version GA_4.7 as an example to analyze the NetComm Software structure and device driver usage. CW PA 10.3 is used to be compatible for the use case code.

What IDE is recommended for programming the LS1020A/LS1021A/LS1022A? The LS1 series is optimized for CodeWarrior, whose latest version, for ARMv7 can be found at http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=CW-LS-ARM7&fsrch=1. What is the LS102xA product family's enablement schedule up to 2016? The launch calendar for the LS102xA family is shown in the figure below. Can one CodeWarrior license cover both LS102x QDS and TWR? The full CW product can be used with either the TWR or QDS board through the CW-TAP probe. Does CodeWarrior for LS1 support flash (NOR/NAND) programming? Yes, CodeWarrior supports both NOR and NAND programming for QDS and TWR. Over what power range is LS102x designed for? LS102x is designed for operation under 3W.  Its ability to yield over 5000 Coremarks at a frequency of up to 1GHz separates the LS102x family from competitors in delivering improved performance without increased power consumption. How fast does the LS102x family run? The LS102x family can run between 600 MHz and and 1 GHz. What endianness does LS102x follow? The LS1 is based on the ARMv7 architecture, which is natively little-endian.  However, ARMv7 supports big-endian using the CPC15 register.  More significantly, many LS1 peripherals, like Ethernet and integrated flash controller (IFC), follow big-endian.  Therefore, LS1 is really a mixed-endian system and one must be mindful of a peripheral's endianness when programming the LS1.

When will you have the final version of the ASK append RCX? The final version is already set for mass production. How do you use the crypto engine? The OCF (Open BSD Cryptogrpahic Framework) is a service virtualization layer implemented inside the kernel that provides uniform access to accelerator functionality by hiding card-specific details behind a carefully designed API.  The LS1024A provides an OCF-based cryptographic driver interfacing Linux security applications and the LS1024A Elliptic 1802 crypto accelerator. What is CMM? CMM stands for Conntrack Monitor Module.  It monitors the Linux connection table and adds/removes connection from the PFE connection table. I get an error when adding a bridge entry via CMM. This error usually crops up if a manual bridge command is attempted while the auto-bridge module (ABM) is disabled.  Try enabling the module then make the bridge in Linux.  The ABM will see this and set up PFE appropriately without you having to do any manual bridging commands. What are the power ramping requirements? The power ramping curve of the LS1024A is linear.  Power supplies will begin at almost the same time, but usually from low voltage to high voltage.  Refer to Section 31.2 of the QorIQ LS1024A Data Sheet for further information on this topic. My RTP Relay isn't working properly. Check that the correct sockets have been created properly. How do I make the RGMII work (RGMII delay)? The LS1024A does not have internal RGMII clock/data delays.  The delay element must be enabled in the external device (switch/PHY), or something must be taken care of in layout, which is not recommended.  Typical symptoms are that the GEMAC can only transfer at low speeds (e.g. 10kbps), or the GEMAC can work at 100Mbps/full duplex, but not at 1000Mbps.

We’re glad to announce the FSL Community BSP 1.7 (codename Dizzy); it has been a busy release cycle with some new boards support added. In total we now support 42 boards from several vendors. During the 1.7 release cycle, a new SoC family support (QorlQ Layerscape1) has been included and the application and graphical stack support (better Wayland, Qt5 and Chromium support to enumerate some) has been greatly extended. This all has been accomplished with way less changes on the core BSP layer (53% less commits) which enforces the compromise of FSL Community BSP with long term quality and support. Another worth citing news is regarding the release notes. It is available online and gives an overview of supported boards, available version for default and optional packages and known issues at time of the release. The release notes has been completely reworked and extended in this release. It now offers a PDF version (for viewing and printing) alongside with the regular online one.