PN7642 C100 - fuse the OTP bit that skips USB-MSC boot

[UdiO]

Hi,

I have a working target that is based on Pegoda 3 with PN7642 C100.

I'm looking to fuse the OTP bit so that the device will no longer expose the USB mass-storage boot path - permanently force the pin-less download.

I couldn't find the address of this fuse to access it with Segger J-Flash or with direct C code.

Your support is highly appreciated

Thanks

Udi

[UdiO]

Thanks Eduardo,

Would it be better to use :
PN76_Sys_OTPConfigs_DwnldReqLessBoot(0);
PN76_Sys_OTPConfigs_LockSettings();

Thanks
Udi

[EduardoZamora · Accepted solution]

Hello @UdiO

Hope you are doing well.

Please refer to PN7642 SDK > docs > PN76-FW-apiguide. OTP Configuration APIs are described in path: Modules > System Service > SYS OTP Config Interface; there you should find some security features such as Code Read protection and SWD disable.

You could, for example, consider PN76_Sys_OTPConfigs_EnableCRP() API.

Regards,
Eduardo.

[UdiO]

Thanks Eduardo,

Would it be better to use :
PN76_Sys_OTPConfigs_DwnldReqLessBoot(0);
PN76_Sys_OTPConfigs_LockSettings();

Thanks
Udi

[EduardoZamora]

Hi,

PN76_Sys_OTPConfigs_DwnldReqLessBoot is used to configure the value to wait in bootloader if pin-less download is enabled. Refer to PN7642 frequently asked questions, Section 2.7.

PN76_Sys_OTPConfigs_LockSettings LOCKS the configurations done by OTP interfaces and does not allow further modification.

Being OTP (One Time Programmable) API calls, these functions shall be used carefully.

Regards,
Eduardo.