How to set hi-buad with PE?

[zhongshen]

Hi,

I have the problem to use uart with hi-baud with PE. When I use PE to config uart1, or uart2 the highest baud rate is 57600. If I set the buad rate with more than 57600, there is a error in the PE.  How to set hi-buad with PE? Thanks.

Here is the picture of the buad setting in PE:

Robert

[BlackNight]

Hi Robert,

the maximum baud depends on your clock settings. But as the dialog says, you can set a baud from 160 to 1310720. So simply enter e.g. 115200 as your baud value, and if this is possible, it will be set and used.

I hope this helps,

Erich

[zhongshen]

Hi Erich,

If I set the 115200 as baud rate, there is error:

by the way, if I set 1310720, PE can accept with no error. As following picture:

[BlackNight]

Then you need to increase the CPU clock (resp. Bus clock) in the CPU component (e.g. using PEE).

I hope this helps,

Erich

[zhongshen]

Could you advise how to increase the CPU clock? What is PEE?

[BlackNight]

That depends to some extend to the device you are using:

Example for KL25Z:

http://mcuoneclipse.com/2012/10/07/tutorial-usb-cdc-with-the-kl25z-freedom-board/

(search for PEE)

Erich

[zhongshen]

Yes, I use KL25Z and KDS 3.0. I do not use codewarrior. The CPU component in KDS PE does not have clock configuration. There is only fsl_clock_manager which can not be changed. And I found a clockMan1 component which can set the clock, but so many parameters, I do not know which parameter can be changed for uart baud at 115200. Could you advise me? Many thanks.

Best regards,

Robert

[marek_neuzil · Accepted solution]

Hello,

In case you need clock configuration for a Freescale target board you can use a board support project that is configured according to available devices on the board including clock sources (e.g. crystal oscillator). When you create a new project select the board support. For example the FRDM-KL25Z target board, see below:

The new project contain 5 clock configuration and there is selected clockMan1_InitConfig4 by default (24MHz bus clock, 48MHz core clock; PLL Engaged External (PEE) mode of MCG).

When you add the fsl_uart component you will be able to select the 115200 baudrate (24MHz / 208 = 115384 baud). See the attached project.

Best regards,

Marek Neuzil

[zhongshen]

Hi Marek,

Thanks for you help!  Based on your project, I reconfigure the MCG setting and it can be set at hi-buad on UART.

Best regards,

Robert Shen