How to configure External Interrupt (on KL15, in PEx)

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How to configure External Interrupt (on KL15, in PEx)

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pklammer
Contributor II

I am trying to configure falling-edge External Interrupt on MKL15Z128VFT4 pin 38 [PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT];

Processor Expert displays "Pin does not support selected edge" but KL15P80M48SF0RM reads in part:

"""

  1. 11.6.3 External interrupts

The external interrupt capability of the PORT module is available in all digital pin

muxing modes provided the PORT module is enabled.

Each pin can be individually configured for any of the following external interrupt

modes:

• Interrupt disabled, default out of reset

• Active high level sensitive interrupt

• Active low level sensitive interrupt

• Rising edge sensitive interrupt

• Falling edge sensitive interrupt

• Rising and falling edge sensitive interrupt

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Lukas_Heczko
NXP Employee
NXP Employee

Hi Pete,

Low-leakage wakeup functionality is controlled by its own HW module and its interrupts are independent from common GPIO/PORT interrupts. It has its own registers, flags and interrupt vector. LLWU module description can be found in the section 3.4.4 Low-Leakage Wake-up Unit (LLWU) Configuration and 15 Low-Leakage Wakeup Unit in the reference manual.

If you use the OnLLSWakeUpINT event from the processor component then the interrupt flags are cleared by Processor Expert driver in the PE_ISR(Cpu_INT_LLWInterrupt) as you mentioned. LLWU flags are write-1-to-clear bits - when flag associated with your pin is set it can be cleared by writing one to it.

So, it is exactly as you described :smileyhappy:

Best regards,

Lukas

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Monica
Senior Contributor III

Hello Pete,

was this suggestion helpful? We'd like to know! :smileyhappy:

Best Regards!

Monica

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pklammer
Contributor II

But this pin is still capable of LLWU interrupt, even if not peripheral interrupt, right?

In a neighboring discussion thread, I was told:

"With a LLWU interrupt, you have two interrupt flags to clear: the LLWU flag, and the peripheral interrupt flag that caused the reset, in this case PortC. "

But you are saying there is no peripheral interrupt flag to clear in this case, right?

What is the code to clear the LLWU flag for LLWU_P9, or is that automatically cleared by Processor Expert code [Generated_Code\Cpu.c: PE_ISR(Cpu_INT_LLWInterrupt) ] ?

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Lukas_Heczko
NXP Employee
NXP Employee

Hi Pete,

Low-leakage wakeup functionality is controlled by its own HW module and its interrupts are independent from common GPIO/PORT interrupts. It has its own registers, flags and interrupt vector. LLWU module description can be found in the section 3.4.4 Low-Leakage Wake-up Unit (LLWU) Configuration and 15 Low-Leakage Wakeup Unit in the reference manual.

If you use the OnLLSWakeUpINT event from the processor component then the interrupt flags are cleared by Processor Expert driver in the PE_ISR(Cpu_INT_LLWInterrupt) as you mentioned. LLWU flags are write-1-to-clear bits - when flag associated with your pin is set it can be cleared by writing one to it.

So, it is exactly as you described :smileyhappy:

Best regards,

Lukas

341 Views
Lukas_Heczko
NXP Employee
NXP Employee

Hi Pete,

Which component do you use? For external interrupts, ExtInt_LDD is available.

Anyway, according to manual, 3.10.1.2 Port Control and Interrupt Summary section, the PORTC doesn’t have interrupt feature, therefore you can’t use this pin for external interrupt. The chapter you refer to is general description; for implementation specific details look into Chapter 3: Chip Configuration.

Lukas

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