Driver timing when bus frequency scaling is enabled on iMX6

[BillHegardt]

I have a customized SPI driver that pulses some GPIOs to handshake with the SPI master.

On a 4.1.15 kernel the driver can pulse a GPIO line and the timing is consistent when bus frequency scaling is enabled.

Am now using a 5.10.72 kernel and I see consistent timing when bus frequency scaling is disabled, but

once I enable it, the GPIO signal pulses can vary by 20-50us and this is causing problems on the SPI master.

Is there a way I can disable bus frequency scaling when the driver is busy with a transfer or otherwise achieve the timing that I was seeing on the 4.1 kernel?

The bus frequency scaling is needed to reduce power consumption.

The pulse routines are implemented like this:

local_irq_save(flags);

gpiod_set_value(s->gpio_cts, 0);

udelay(3);
gpiod_set_value(s->gpio_cts, 1);

local_irq_restore(flags);

Thanks

[christy2951hernandez]

Hello NYStateofHealth@BillHegardt,

Determine which parts of your driver code require precise timing and are sensitive to timing variability caused by bus frequency scaling. Before entering a critical section of code, disable bus frequency scaling to ensure consistent timing. Perform the critical operations with precise timing while bus frequency scaling is disabled. After completing the critical section, re-enable bus frequency scaling to conserve power when not performing time-sensitive tasks.

Here's a simplified example of how you might implement this approach.

// Disable bus frequency scaling
disable_bus_frequency_scaling();

// Perform critical operations with precise timing
local_irq_save(flags);
gpiod_set_value(s->gpio_cts, 0);
udelay(3);
gpiod_set_value(s->gpio_cts, 1);
local_irq_restore(flags);

// Re-enable bus frequency scaling
enable_bus_frequency_scaling();

You'll need to implement the disable_bus_frequency_scaling() and enable_bus_frequency_scaling() functions according to the specific mechanisms available on iMX6 for controlling bus frequency scaling. This may involve interacting with the CPU frequency scaling governor, adjusting clock frequencies directly, or using platform-specific APIs.  

Keep in mind that disabling bus frequency scaling will increase power consumption, so it's essential to only disable it when necessary for maintaining timing requirements and re-enable it promptly afterward to conserve power. Additionally, thoroughly test your implementation to ensure it meets your timing requirements and doesn't introduce any unexpected behavior or side effects.