DMATransfer_LDD issue

[tmf]

Using K60 tower system and CW10.1.9 with PE. Cortex M4

I can not find a trigger for PIT in the pull down tiggers in DMATransfer_LDD.... everything else seems there.

I want to send data to DAC from buffer, using DMA, and timed transfers to the DAC every 25uS using the PIT.

Anyone show me code in PE for this?

Also where on the web is a more popular place for FreeScale M4 type questions......

[Lukas_Heczko]

Hi,

I think you are looking for periodic trigger functionality supported by Kinetis eDMA. To enable it, set Periodic trigger property to Enabled and choose one of Always enabled slots in Trigger source property (see attached screenshot). In this configuration DMA transfers on chosen DMA channel will be triggered by PIT. One remark – periodic trigger functionality is available only for DMA channels 0, 1, 2 and 3.

Best regards,

Lukas

[tmf]

Does the PIT (set at 1s) control when the whole buffer is transfered say 256 bytes every 1s, or does it send 1 byte out every 1s (assuming we set it to send 8 bits at a time)

I am confused about this......

what is the correct terminology for this? there is a trigger that starts a complete transfer, and a trigger that send the data out byte by byte..... sometimes I see trigger sometimes request?

Thanks.

[Lukas_Heczko]

Regarding your first question: both variants are possible – it depends on how eDMA channel Transfer Control Descriptor (TCD) registers are configured. eDMA engine supports nested transfers – basically it means there are two counters – minor loop counter which counts bytes transferred during transfer started when DMA request arrived, and major loop counter which counts executed minor loops.

If you set major loop to 1, eDMA will work in Single transfer mode – when DMA request comes, only bytes set in byte count (minor loop counter) are transferred. After transfer completion DONE flag is set and DMA channel retires.

If you set major loop >1, eDMA works in Nested transfers mode – each incoming DMA request starts transfer of data segment with length set in byte count (minor loop counter). When each DMA request is serviced major loop counter is iterated and DMA channel is waiting for next DMA request. This algorithm is executed until required number of major loops (required number of DMA requests) are serviced – then DONE is set and channel retires.

In your example – if you set 256 bytes in byte count (minor loop counter) and 1 in major loop count, when DMA request arrives, all 256 bytes will be transferred at once. But if you set 1 byte in byte count (minor loop counter) and 256 in major loop counter, then after each DMA request 1 byte will be transferred and all 256 bytes will be transferred after 256 DMA requests.

(For detailed eDMA engine explanation please see Functional description chapter in eDMA module description in Kinetis resource manuals)

Regarding your confusion between triggers and requests: DMA requests triggers DMA transfers, so often they means the same, regardless of used mode (Single/Nested). There are different types of sources which can trigger transfer – request from on-chip peripheral, SW request or “always enabled” requests. If Periodic trigger functionality is used, transfer is not triggered until both PIT trigger is asserted AND DMA request from selected source is asserted (This is why always enabled source is used for – it is always asserted).

Best regards,

Lukas

[tmf]

Please see attached file for my work, I am not sure what I have done wrong, can you please comment on changed you need to make to this to make it work.

[Lukas_Heczko · Accepted solution]

Hi,
In your project, you need to increment address by 2 bytes after each memory reading (so set Data source/Adress offset = 2) and after whole transfer completes/whole SignalArray is sent decrement back to array start (After transfer complete/Source address adjustment = -256).

Data source/Address offset = 2 will increment source address after each DMA read-write operation (each move of data word from source to destination through DMA  may consist of more than one read-write operation).

For example, if you'll try to move longer data arrays in one "minor loop" transfer, using After request adjustment will fail as source address will be incremented only after whole requets service. Let say you are moving 64 bytes from memory to memory using 32-bit transfer size on both source and destination side. Then eDMA will perform 16 read-write operations (64B/32b) and source and destination address had to be incremented by 4 bytes (32-bit transfer size) after each of R-W operation (to move to the next 32-bit portion of transfered 64 bytes). This is done by setting Data source/Address offset = 4 and Data destination/Address offset = 4. But if After request complete/Address offset = 4 would be used, source/destination address would be incremented after 16 R-W operations copying only from ONE address to another.

So you need to change these properties:
Data source/Address offset = 2
After request complete = No action
After transfer complete/Source address adjustment = -256

Here is what I’ve got then from console
START AGAIN 536809880
START AGAIN 536809880
START AGAIN 536809880

(...)

Hope it will help you..

Best regards,

Lukas

[tmf]

You have been helpful and it is working as a brute force transfer, all at once.

I am using nesting say of X interation, so X DMA requests are needed to get the fulll buffer moved.

I have set up the channel as 0 and also set up PIT0, so each of these individual transfers will be timed out.

RIght now its coming out at 4.8Mbytes/s with 48Mhz bus clock.

I want it to come out at 40khz, hence the reason to setup the PIT.

I have looked at the generated code and all looks fine, yet I can not get the transfers to slow down.....

What needs to be set to make it happen, and what could cause it not to function.

Again I am setting it all up in Processor Expert.

I have attached image of the DMA, DMA TRANSFER, and TIMER setups (wish there was a simpler way to show this.... like print outs direct from software)

Richard.

[tmf]

almost there!

OK that works, I will look it over more to fully understand it.....

Now I had set periodic trigger and set PIT0 to 1s period, thinking these values would come out 1s spaced, right now they are coming out in approx 7.5us/256 very fast.....

Thanks!