p2020处理器uboot通过eLBC访问FPGA的时序问题

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p2020处理器uboot通过eLBC访问FPGA的时序问题

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2,089 Views
xiaocheng
Contributor II

目前我们用了P2020处理器(型号为:P2020NXE2KHC),在LBC总线的使用上遇到了时序问题,希望能帮指点一下解决的方向,具体描述:


1. P2020
处理器工作频率1GHz,平台时钟为500MHzLCLK31.25MHzLBC处于GPCM模式,SerDes配置为2x1 3.125GHz SRIO
2. LBC
总线连接在FPGA
3. BR1
寄存器设置为0xEA001001OR1寄存器设置为0xFF800083

4. LCRR的值为0x80000008
5.
通过FPGA中的逻辑分析仪发现CS1的片选有效时间很短(只有56LCLK的样子),和设置完全不符。修改OR1寄存器的值对CS的宽度也基本无影响,这个现象是为什么

备注:

      1,目前我采用2009.11的uboot代码移植的(见log1),后来更换为2015.01也是上述现象(见log3);

      2,采用2015.01时,从CPLD最小改动为FPGA后(见log2),也是上述现象,访问FPGA数据不正常。

以下为具体资源分布信息:

地址

大小

描述

0x0000_0000-(0x8000_0000-1)

2G

Memory

0xA000_0000-(0xB000_0000-1)

256M

SRIO1 memory space

0xB000_0000-(0xC000_0000-1)

256M

SRIO2 memory space

0xEFE0_0000-(0xEFF0_0000-1)

1M

CCSRBAR,串口基地址偏移量为0x4500(COM0)0x4600(COM1)

0xF000_0000-(0xF800_0000-1)

128M

FLASH (16Bit)(CS0)

0xEA00_0000-(0xEA80_0000-1)

8M

FPGA (16Bit)(CS1)

0xE980_0000-(0xE990_0000-1)

1M

外部UART8bit)(CS2):

COM2基地址为0xE980_0000

COM3基地址为0xE980_0020

0xE9A0_0000-(0xE9B0_0000-1)

1M

1553B总线(16Bit)(CS3):

第一路基地址为0xE9A0_0000

第二路基地址为0xE9A4_0000

第三路基地址为0xE9A8_0000

注:1. COM0COM1CPU内部串口,其中COM0DEBUG串口, CPU输入频率83.33MHz

  1. COM2COM3FPGA实现串口,参考频率44.2368MHz
  2. NOR FLASH型号为S29GL01GS(SPANSION),容量128MB
  3. CPU型号为P2020NXE2KHC,工作频率1GHzPLATFORM频率500MHzDDR3频率800MHz

       5 .SPI FLASH型号为M25P16VMW6TG (MICRON/ST),容量2Mbyte

1 Solution
1,257 Views
alexander_yakov
NXP Employee
NXP Employee

Sorry, this public community is worldwide, and therefore our community language is English only.

The most probable reason of the problem you observing is early transfer termination caused by absence of pull-up resistor on LGTA pin. Please check if pull-up resistor on LGTA pin is present, properly mounted and has desired value.

Please look P2020 Reference Manual, Section 12.4.2.4 for more details.


Have a great day,
Alexander
TIC

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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4 Replies
1,258 Views
alexander_yakov
NXP Employee
NXP Employee

Sorry, this public community is worldwide, and therefore our community language is English only.

The most probable reason of the problem you observing is early transfer termination caused by absence of pull-up resistor on LGTA pin. Please check if pull-up resistor on LGTA pin is present, properly mounted and has desired value.

Please look P2020 Reference Manual, Section 12.4.2.4 for more details.


Have a great day,
Alexander
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

1,257 Views
xiaocheng
Contributor II

Hi,Alexander,

Thank you very much for your reply. The reason for the problem is indeed as you said. LGTA has not pulled up. At present, I have set the LBRC register LPBSE to 1 to solve it. Thank you!

1,257 Views
xiaocheng
Contributor II

希望得到大神的指点,不甚感谢!

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396 Views
LRZ
Contributor I

您好,我想问一下,为什么LOG2里CPU0频率为1250MHz?期待您百忙中可以回复。

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