UCC of MPC8321 in UART mode

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UCC of MPC8321 in UART mode

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priyadarshiniba
Contributor I

Hi Folks,

In MPC8321, we are trying to use the UCC2 in UART mode. As mentioned in the Application notes AN3361.pdf we loaded the RAM microcode package (Slow_QeLite11_mpc8323_r1.1.h and Slow_QeLite11_mpc8323_r1.1.c) in order to overcome the eratta.

In device tree, added the configuration as follows:

ucc2: serial@3000 {
      device_type = "serial";
      compatible = "ucc_uart";
      reg = <0x3000 0x200>;
      cell-index = <2>;
      port-number = <2>; /*Minor used in creating the device file name and its node*/
      rx-clock-name = "brg9";
      tx-clock-name = "brg10";
      interrupts = <33>;
      interrupt-parent = <&qeic>;
};

When we try to transmit the Data, the Tx is not happening since the "Ready" bit of Buffer descriptor is never set to "0".

The same thing happens When we tried with Internal Loopback mode. 

Do we need to include anything else like soft UART ? Please provide Suggestions to overcome the issue.

Thanks in Advance. 

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Pavel
NXP Employee
NXP Employee

Sorry for delay. It looks like that microcode is incorrectly loaded.

Test your board using "INIT RX AND TX" command of the QE. Is FLG Command semaphore flag cleared in the CECR register after this command?


Have a great day,
Pavel Chubakov

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