The RCW used is as follows-
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x87
0C10000e 0e000000 00000000 00000000
40000000 00400012 EC110000 21000000
00000000 00000000 00000000 00038000
00000000 C0165A05 00000000 00000000
Solved! Go to Solution.
Thanks @yipingwang for your valuable suggestions.
Initially there was issue in DDR connectors, the same was resolved after soldering the connectors properly. Afterwards there was problem in SPD data of DDR when cross verified from the vendor datasheet. The DDR SPD data was modified in uboot, then DDR initialized properly.
For future DDR related issue we have started the process of purchasing Code Warrior Tap tool for DDR validation.
Please create a QCVS DDR project with reading from SPD method, then connect this project to your custom board with DDRv tool to do optimization and validation to get the optimized DDR controller configuration parameters.
Then modify the following variable in board/freescale/t102xrdb/ddr.c according to the data generated by DDRv tool.
static const struct board_specific_parameters udimm0[
Thanks @yipingwang for your valuable suggestions.
Initially there was issue in DDR connectors, the same was resolved after soldering the connectors properly. Afterwards there was problem in SPD data of DDR when cross verified from the vendor datasheet. The DDR SPD data was modified in uboot, then DDR initialized properly.
For future DDR related issue we have started the process of purchasing Code Warrior Tap tool for DDR validation.