SDRAM Little endian & big endian confusion for MPC8270

[muhammadahmed47]

Hi i am interfacing IS45S16320F-7BLA2 (SDRAM 32Mx16) with MPC8270. As per reference manual of MPC8270 on pg# 11-34 it connects address and data lines in ascending order. (A0 - A0)

But the reference design which i am following is PQ2FADS-VR. It is also attached in this post.

In this design it is interfacing MPC8275 Address with SDRAM in descending order. (A28 - A0) .

And for Flash both address and data is in descending order. I do not get it . What is the right configuration. Kindly help me.

[r8070z]

Have a great day,

In the manual Figure 11-19 does not show address bits order of the connections. On the MPC8270 pins A0 and D0 provides the most significant bit. On SDRAM and FLASH chips naming convention is opposite and pin A0 is input for the least significant bit. The PQ2FADS-VR schematic show correct connections.

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