QE brg pin mux

[yunyuaner]

I've configured ucc5 as uart, and use brg16 for rx_clk and brg7 for tx_clk.

brg16 is muxed with gpio_pc6 and brg7 is muxed with gpio_pc15, I'm not sure if I should set them as brg, since brg is routed and serviced as the internal clock of uart, why does it need to be a output signal? 

Thanks

Jia

[yunyuaner]

Hi Serguei,

Thanks for quick reply!

Do you mean BRGO is not needed for UART when transmitter and receiver operate asynchronously, but BRG is still need to be routed to internal uart rx_clk and tx_clk? By the way, can brg1~brg16 routed to arbitrary ucc(ucc1~ucc8)?

Thanks

Jia

[r8070z]

For UART when transmitter and receiver operate asynchronously BRG0 is not needed and you can leave pc6 and pc15 pins as GPIO or configure it for any other possible functions. Of course internal rx_clk and tx_clk must be applied to the UCC. Please see in the manual table which  BRG(s) can provide clock for given UCC.

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[r8070z]

I assume as brg16 is muxed with gpio_pc6 you mean that BRG6 output signal (BRGO) can be provided on port C pin (pc6). For UART when the transmitter and receiver operate asynchronously, there is no need to connect the transmit and receive clocks. So in this case BRG0 is not needed and you can leave pc6 and pc15 pins as GPIO or configure it for any other possible functions.