P1020Wlan Adding support for NAND flash. u-boot ony configured for NOR flash.

[johnclark]

I posted this last Friday to another forum, perhaps the wrong one. Found this forum under 'hardware', so I'm reposting here.

I am looking for information on either u-boot for the p1020 series, or for a linux driver which allows for use of a NAND flash device, in a situation were there is NOR flash used for standard booting processes.

When we implemented the board, we put both types of flash on the board, and now I have need to use the 256M NAND flash device.

Since the original board did not use the NAND flash the u-boot image does not contain any intitialization for it, and it appears that the linux driver does not get the correct OF device tree settings, to 'see' the device.

The current yucktoe package does not go that 'far back' in processors to support getting the current u-boot package and figuring this out.

[yipingwang]

You could refer to P1020RDB-PC as an example.

Please refer to the build configuration file

configs/P1020RDB-PC_NAND_defconfig

Please refer to spl.c, spl_minimal.c and Makefile in board/freescale/p1_p2_rdb_pc to define spl. Please add the NAND TLB entry in board/freescale/p1_p2_rdb_pc/tlb.c. Please add NAND LAW entry in board/freescale/p1_p2_rdb_pc/law.c.

Please refer to include/configs/p1_p2_rdb_pc.h to add NAND flash related parameters as the following.

#define CONFIG_NAND_FSL_ELBC 

#ifdef CONFIG_NAND_FSL_ELBC
#define CONFIG_SYS_NAND_BASE 0xff800000
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull
#else
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
#endif

#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#if defined(CONFIG_TARGET_P1020RDB_PD)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#else
#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
#endif

#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
| BR_PS_8 /* Port Size = 8 bit */ \
| BR_MS_FCM /* MSEL = FCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB /* small page */ \
| OR_FCM_CSCT \
| OR_FCM_CST \
| OR_FCM_CHT \
| OR_FCM_SCY_1 \
| OR_FCM_TRLX \
| OR_FCM_EHTR)
#endif /* CONFIG_NAND_FSL_ELBC */

Define SPL related parameters.

/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
SPL code*/
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif

if defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_MAX_SIZE 4096
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000
#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10)
#endif /* not CONFIG