NAND bitflip correction on 8314

[jefftharris]

Does the NAND controller on the 8314 CPU provide notification for an ECC-corrected bitflip error?  The 8313 CPU contains the LTECCR register.  Does the 8314 support this register as well?  If not, is there another method to detect the condition so the Linux UBI driver can scrub the block before an unrecoverable error occurs?

[r8070z · Accepted solution]

Have a great day,

Yes there are MPC83xx eLBC which do not have LTECCR register. According to MPC8314 documentation there is not LTECCR. The Freescale Enhanced Local Bus Controller NAND driver (fsl_elbc_nand.c) says that "if the ELBC doesn't have the lteccr register it reads 0".So it read it always

if (lteccr & 0x000F0000) {

       mtd->ecc_stats.corrected++;

       elbc_fcm_ctrl->max_bitflips = 1;

but without LTECCR ecc_stats.corrected will be not incremented. I do not see another method with hardware support in this case. Of course there is bulky method when we read the same page two times first when ECC correction is enabled and second when it is disabled and then compare.

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[jefftharris]

NXP confirmed the 8314 does not have the register.  The double-read method works but is slow as expected.

Jeff