Hi NXP Community,
We have a device where an older subset of our devices in production have an erroneous 0 ohm resistor (R9 on the diagram below) connecting A8 on the MPC875, and causing bank select 1 to be unable to be driven by A6, so we only get half the memory bank select addresses.
The first course of action is to attempt to fix it by either:
* Turn Port A8 into a High-Z (High impedance) state, thus allowing A6 to drive the bank select pins thus fixing the problem in software.
* Have A6 and A8 drive the DRAM together
Or if that's not possible to fix, the second course of action is to test if this hardware bug exists, by either:
* Perform a GPIO test to determine if A8 and A6 are electrically connected
* Running a memory test on two mirrored locations on physical memory
Linux version: 220.127.116.11
boot version: 2009.03
Looking for any help, ideas, or advice we can get, since this is in End Of Life; We're just trying to see what's possible. Thanks!
There is no possibility to turn A8 into High-Z state.
Usually JTAG test port is used for testing of pin connection. See the Chapter 54 in the MPC885 Reference Manual: