MPC8548CDS Qemu U-boot Ethernet Issue

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MPC8548CDS Qemu U-boot Ethernet Issue

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pbasvat
Contributor I
Hi, I am trying to simulate mpc8548 powerquic processor using qemu as i don't have any boards with me. but while trying to simulate i am facing issue of ethernet interface at u-boot level. Below are steps i have used for qemu source compilation & u-boot cross-compilation for mpc8548 hw. Qemu compilation for powerpc # ./configure --prefix=/home/pbaswat/TechnicalWS/QUEMU/install_dir/ --target-list=ppc-softmmu,ppc64-linux-user,ppc-linux-user,arm-softmmu,arm-linux-user --enable-debug --disable-strip --disable-werror # make && make install U-boot cross-copilation 1) # export LD_LIBRARY_PATH=/opt/PPC/cross-tools/lib/ 2) # make ARCH=powerpc CROSS_COMPILE=powerpc-unknown-linux-gnu- MPC8548CDS_config 3) # make ARCH=powerpc CROSS_COMPILE=powerpc-unknown-linux-gnu- qemu powerpc launch command # sudo qemu-system-ppc -M ppce500 -m 1024M -nographic u-boot.bin -device e1000 -net nic -net tap,ifname =vnet0,script=no,downscript=no ------------------------------------------------------------------------------------------------------------------------------------------ $ sudo qemu-system-ppc -m 1024 -M ppce500 -nographic u-boot.bin -device e1000 -net nic -net tap,ifname=vnet0,script=no,downscript=no ----------------------------------------------------------------------------------------------------------------------------------------- U-Boot 2019.01 (Mar 04 2019 - 11:07:45 +0100) CPU: Unknown, Version: 0.0, (0x00000000) Core: e500, Version: 3.0, (0x80210030) Clock Configuration: CPU0:400 MHz, CCB:400 MHz, DDR:200 MHz (400 MT/s data rate), LBC: unknown (LCRR[CLKDIV] = 0x00) L1: D-cache 32 KiB enabled I-cache 32 KiB enabled DRAM: 1 GiB L2: disabled PCI: base address e0008000 00:01.0 - 1af4:1000 - Network controller 00:02.0 - 8086:100e - Network controller PCI1: Bus 00 - 00 In: serial Out: serial Err: serial Net: guts: Unknown register read: 8 guts: Unknown register read: 8 guts: Unknown register write: d8 = ffffffff guts: Unknown register write: 100 = 0 guts: Unknown register write: 400 = 8000000 guts: Unknown register read: 8 guts: Unknown register read: 0 guts: Unknown register write: 0 = 4 guts: Unknown register write: d8 = ffffffff guts: Unknown register read: c0 guts: Unknown register read: 10 guts: Unknown register read: 8 e1000: 00:00:00:00:00:00 e1000#0 Error: e1000#0 address not set. Hit any key to stop autoboot: 0 =>
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yipingwang
NXP TechSupport
NXP TechSupport

I need to discuss this issue with the AE team, will provide feedback later.

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yipingwang
NXP TechSupport
NXP TechSupport

Please refer to the following update from the AE team.

We support QEMU to boot Linux kernel, but nobody has verified booting uboot. I think you can let customer know. It looks like that  their purpose is to boot Linux, so they don't have to boot uboot. Please check out LSDK UM, ch 10.

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