MPC8349 maximum lbiu_clk frequency

[EAlepins]

Hi,

MPC8349AEC Rev. 13 "Hardware Specification" "Table 57. Operating Frequencies for TBGA" mentions that the maximum "Local bus frequency (LCLKn)" for a 533 MHz device is 133 MHz. However, LCLKn is obtained by a 1/2, 1/4 or 1/8 factor from lbiu_clk (also called lbc_clk). It is not possible to find in the documentation what is the maximum frequency of lbiu_clk (lbc_clk). Nothing in the documentation prevents setting lbiu_clk to 533 MHz by using RCWL[LBIUCM]=1 with a csb_clk of 266 MHz, while maintaining the local bus frequency to 133 MHz by using a LCRR[CLKDIV]=4.

If possible, what is the difference between the following two configurations? Will it increase performance?

1- 266 MHz csb_clk, 133 MHz local bus frequency, 266 MHz lbiu_clk

2- 266 MHz csb_clk, 133 MHz local bus frequency, 533 lMHz biu_clk

Thanks.

[alexander_yakov · Accepted solution]

The maximum lbiu_clk frequency limitation is the same, as specified for csb_clk frequency (see processor Hardware Specifications, Table 57). The reason why lbiu_clk multiplier is useful is described in Reference Manual: "The 2:1 mode is useful when the csb_clk operates at low frequency". That is - if you wish to reduce csb_clk, for example, to reduce power consumption, you can double its output frequency by enabling 2:1 multiplier to feed LBC controller with doubled frequency.

Have a great day,
Alexander,
TIC

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