MPC 8548 can be configured as PCI RC or PCIe EP. I want EP to EP communication. Is it supported? Now if I want to excercise EP to EP communication, what are the various configuration I need to do for this?

[sheetalpurohit]

I have a customised board with MPC 8548. I would make a set up for EP -EP communication using these boards. For this I am using one board in which processor is configured as RC. Also the same board has one end point device ( not processor). Now on other board, I configure processor as EP. I want Processor on second board ( configured as EP) to access memory/registers of EP device of 1st board.

First thing which I want to confirm - the support for Peer to Peer communication. Another important thing which I understand is memory translation using outbound and inbound windows.

Do i need to look at any other configuration regarding processor. Please suggest if I have missed anything.

[r8070z]

Using PCIe switch we can connect several EP to the RC. In such configuration one EP can access to memory of the other EP via the switch. However according to the PCIe specifications there must be RC which at least configure switch and EPs.

[sheetalpurohit]

yes you are right, I have a PCIe switch connected to RC through upstream port and two EPs connected to downstream ports of switch. In my configuration, RC is MPC 8548, one EP is also MPC 8548 (EP1) and other endpoint is FPGA (EP2).  EP2 (FPGA) wants to access local memory of other EP1 ( processor). This is Peer to Peer communication. Is it supported as per PCIe Specification? I understand that I need to set PCie inbound and outbound windows of EP1. please suggest if any additional configuration needs to be done?