One issue is that on higher data rate the CPU is resetting it self more the 115200 .. 10000000 it is not depending only on speed but also in amount of bytes sent.
In the MPC860 manual it written that SMC (core 25MHz) support 220Kbs we here want to have it 1MHz CPU speed of 66MHz.
As I understood from the Manual appendix B. for Serial performance is that the performance is depending on some factors such as SMC internal FIFO (2 bytes) and if the CPM is busy with other jobs.
1. Question is if we intend to use the SMC is that realistic to expect continuos communication of 1 Mb FD (one mega bit) at all.
2. Is that crashing of the CPU could happen because of CPM overloading ?
3. Is there any microcode patch that can fix this.
Micha
SMC is software-emulated controller, it is implemented as software microcode running on internal CPM core.
Because of this reason, running this controller at high speed produces high load on internal CPM core and may cause character corruption, if this performance is not enough.
For high speed UART operation we recommend using hardware-type UART - SCC. This controller can sustain 1mbps UART without significant impact on CPM core performance.
To answer your questions:
1. No, I do not think 1 mbps is realistic for SMC. I suggest using SMC for low speeds only, let say not more than 115200. For higher speeds please use SCC.
2. The above description does not contain a description of "crashing" you observing, so I can not comment this. Typical behavior due to overload is character corruption,
3. No, there is no microcode patch, because the problem is not caused by microcode error.
Have a great day,
Alexander
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