DDR_SDRAM_CFG[ECC_EN] ECC Enable/Disable

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DDR_SDRAM_CFG[ECC_EN] ECC Enable/Disable

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kaurnakarhv
Contributor II

DDR_SDRAM_CFG[ECC_EN] ECC Enable/Disable:

Can this register value be enabled/disabled during run time?

Can anyone show insight on this?

Thanks.

Regards,

Karunakar

ラベル(1)
  • DDR

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1,333件の閲覧回数
lunminliang
NXP Employee
NXP Employee

Hello Kaurnakar HV

Yes, you can change that. But it's not recommend to do this on-the-fly. Based on experience from our engineer, this could be problematic to guarantee the pipeline of DDR transactions will not cause a read to data with uninitialized ECC.


Have a great day,
Lunmin

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1,333件の閲覧回数
kaurnakarhv
Contributor II

Thanks for sharing the information.

Can you please elaborate more on this -

"This could be problematic to guarantee the pipeline of DDR transactions will not cause a read to data with uninitialized ECC"?

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