CD, CTS, RTS as GPIOs in MPC8321's UCC

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CD, CTS, RTS as GPIOs in MPC8321's UCC

Contributor I

Hi Folks,

In our project we are using QUICC Engine's UCC of MPC8321 in HDLC as well as Transparent mode. The Control Signals CTS, RTS and CD should be shorted if we use the UCC in Loop-back mode or else those signals should be driven according to the third party device. 

Now the requirement is we need to configure the CTS, CD and RTS as GPIOs.

1) We tried to configure the PINS as GPIOs. But the system gets hung.

For Example, I am using UCC2 . Following are the pins and their corresponding CPPAR and CPDIR values.

PINS: PA26, PA28 and PA30

CPPAR_REGS: 00, 00 and 00

CPDIR_REGS: 11, 11 and 11

My Queries are

1) Are the Pin Configurations right to make the pins as GPIOs? 

2) What should be the CPDIR value for the respective pins?

2) Functionality wise What happens if we configure those pins as GPIO? How the Flow control will be handled?

Thanks for you Kind reply in advance.

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1 Reply

NXP TechSupport
NXP TechSupport

Sorry for delayed response.

1. Yes.

2. Setting CPDIR to "11" enabled both input and output sides of GPIO pin. Please look MPC8323 Reference Manual, Figure 3-8

3. This question is answered in Table 3-11 - Functions SER2_CD and SER2_CTS will be connected to "Default Input" - GND. Function SER2_RTS will be left unconnected, because RTS is output.

Have a great day,

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