Boot T1022 from other locations in SPI NOR flash

[sarkarsouvik]

Hello All,

I have a custom T1022 child board wherein the processor boots up from the uboot stored in SPI NOR Flash. I am planning to store multiple uboot(s) in the said NOR flash so that the processor boots up according to the parent board in which this child board is mounted. So my questions are:

1) Is it possible to do so? (Currently I have tried copying uboot between locations, but it is too slow)

2) As per the .cmm file, the uboot is always stored at location 0. Why is that? Can we change this location somewhere so that it asks the user for the uboot location?

Any suggestions regarding this is welcome.

Thanks and Regards,

Souvik

[yipingwang]

Discussing with the AE team.

[sarkarsouvik]

Hello,

Any help with this? 

[yipingwang]

Please refer to the following update from the AE team.

Regarding multiple Uboot(s) in the NOR flash. Can you please tell us a bit more about the requirement as to why you would need 2 Uboot in the NOR flash? "the processor boots up according to the parent board in which this child board is mounted" -- please elaborate on this.

[sarkarsouvik]

Hello,

I have designed a T processor child card. Currently, I have 3 different parent cards onto which this child card is to be mounted. Now, these 3 cards have different SRDS_PRTCL, different GPIO configurations, etc. I was thinking if we could by any change have a card-dependent boot-up instead of programming uboot multiple times whenever we change the parent board. Hence the requirement.

Hope I am clear in my requirement.

Thanks,

Souvik

[yipingwang]

Can you not make 3 different device tree binaries that will have different gpio configurations depending upon the parent card? And when needed, you could load your image with that specific dtb.
these 3 parent cards are built out of same application processor?

[sarkarsouvik]

When you say "you could load your image with that specific dtb.", do you mean that the parent cards keep their respective dtbs and when the processor boots up it loads the dtb stored in the parent card? If what I have understood is correct, this could be a possible solution alternative if the dtb is able to change the serdes configuration.

In my case, consider a parent card A wherein we need the SRDS_PRTCL to be 0x86 and another parent card B wherein the SRDS_PRTCL is required to be 0x81 and we have a single processor child card. How can we ensure that the processor boots up as per the SRDS_PRTCLs for each board. In my opinion, dtb fetching starts after uboot has executed. But I need the uboot to be changed as per the parent card.

[yipingwang]

Will discuss with the AE team.

[yipingwang]

you want to change the gpio and serdes configuration of child board right ? then you have to keep 3 different RCW on IFC NOR of child board.

RCW is fetched by the PBL. Uboot comes later than the PBL stage so Uboot will not be able to handle this

[sarkarsouvik]

Ok . Thank you. I understood the way.

Last question. How can we ensure that PBL fetches from a different location of the IFC NOR? I couldn't find any field wherein we set the fetching location.

[yipingwang · Accepted solution]

Because you have to fetch different RCW from IFC NOR, you would have to manipulate the address lines going towards the IFC NOR. Example - IFC NOR is divided into virtual banks, and there is a logic with which we select a particular bank. you can go through the hardware design guide once for this. So you would need either a CPLD or an external controller that lets you switch the banks in the IFC NOR. So that different RCW present in different banks can be fetched by the PBL using that logic. So this needs a hardware design modification.

[sarkarsouvik]

Ok. Thank you for your help.

[yipingwang]

You are welcome.

[yipingwang]

Investigating.

[yipingwang]

So here's what you would need :-

RCW has the gpio and serdes configuration. So depending upon the 3 parent cards, you need 3 different RCW having the desired configuration.
At power-on reset, PBL[Pre-bootloader] fetches this RCW from one of the desired non-volatile sources[IFC NOR, eSDHC,NAND flash] and loads this configuration. One of the possible solutions is to use IFC NOR as a source.
IFC NOR would have 3 different RCWs present in 3 different memory partitions.

The parent card has to be designed in such a way that
when the child board is connected to Parent card A, the RCW gets fetched from partition A in the IFC NOR.
when the child board is connected to Parent card B, the RCW gets fetched from partition B in the IFC NOR.
similarly for the third Parent card.

[sarkarsouvik]

In this case, we have to keep the IFC NOR FLASH on the parent boards instead of the child card. Am I correct?

If we keep the NOR flash on the child card instead, how can we ensure that the RCW loads from different partitions? Can the partition locations be written on the uboot stored in SPI flash?

[yipingwang]

Will back to you

[yipingwang]

Got it.

[yipingwang]

I have escalated this case to the AE team, am waiting for the feedback from them now.