8260/8260A XFC Capacitor Value

[scottgerhold]

We have the 8260A sourced with a 50MHz clock. We have the MODCK set to a CPM MF of 2, to set the CPM to 100MHz. We are considering changing the core frequency and want to know if that will ever impact the XFC cap, or if it is strictly related to the CPM_CLK/CLK_IN ratio.

Is that strictly driven by the CPM MF and not the Core frequency MF. Thus, if the Core is set with a multiple of 3 or 7 it doesn't change the capacitor as long as CPM multiplier remains the same?

There is only one capacitor, and the text in the User's Manual refers to it being only related to the CPM_CLK/CLKIN and not impacted by the Core frequency. I am just making sure that is correct and there isn't something else that should change when the MF for the core is changed.

@brianross

[ufedor]

You wrote:

> Is that strictly driven by the CPM MF and not the Core frequency MF.

> Thus, if the Core is set with a multiple of 3 or 7 it doesn't change the

> capacitor as long as CPM multiplier remains the same?

Yes - refer to the MPC8260 PowerQUICC II Family Reference Manual, Table 10-1. Dedicated PLL Pins, XFC.

Additionally you could refer to the AN2638 - Effects of Clock Jitter on the MPC8260 (HiP3 and HiP4):

https://www.nxp.com/docs/en/application-note/AN2638.pdf