VR5510 Power-On & Power-Off issue repeatly
11-16-2022
03:44 PM
617件の閲覧回数
Jerry87
Contributor I
- 新着としてマーク
- ブックマーク
- 購読
- ミュート
- RSS フィードを購読する
- ハイライト
- 印刷
- 不適切なコンテンツを報告
Hello Sir,
My design is based on NXP’s GoldBox. The only difference is that GoldBox pow-rail is +12V DC, but my design is +14.4V DC as shown in picture below.
However, on my prototypes, we have seen the fact that VPRE_3V3 (IC Pins: 35, 36, 6) is power ON, power OFF, power ON, power OFF etc repeatedly.
My finding:
- When we removed C477, this issue can be resolved. So we suspect that there is a timing issue on power on sequence on PWRON1.
- In GoldBox, PWRON1 take 5.12ms for rising edge in average; our design is about 7ms for rising edge in average. Could you please let us know what the minimum & maximum rising edge time of PWRON1?
- Based on our issue, is there any other points that we need to investigate?
1 返信
11-18-2022
08:09 AM
604件の閲覧回数

NXP TechSupport
- 新着としてマーク
- ブックマーク
- 購読
- ミュート
- RSS フィードを購読する
- ハイライト
- 印刷
- 不適切なコンテンツを報告
Hello Jerry,
I hope all is great with you.
Please review the response from the PMICs team below:
Please check below plot, we recommend T1>3ms, T2>7ms. Customer can check whether the T2>7ms is met.
Therefore, to power up PWRON12 should wait at least 3ms. Once it is powered up, you should maintain VDDOTP at least 7ms more.
I hope this information helps.
Regards,
