Unable to activate FaultBMS pin on MC33771C

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Unable to activate FaultBMS pin on MC33771C

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Rebecactag
Contributor I

Good morning,

We need to act in case of overflow/underflow in COULOMB_CNT or overflow in CC_NB_SAMPLES, so I have enabled the activation of pin 40 "FAULT pin", however it does not activate despite overflow of those registers. What I have done is the following:
- Unmask bit 15 of the FAULT_MASK3 register corresponding to the CC_OVR_FLT bit.
- Set FREE_CNT (1) in ADC2_OFFSET_COMP.

I don't know if there is anything else I need to do that I haven't done.

Thank you very much for your help.

Regards,

Rebeca.

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3 Replies

439 Views
Rebecactag
Contributor I

Good morning Jozef,

Yes, I_MEAS_EN is activated and does not enter the SLEEP state.
In FAULT3_STATUS the overflow error is activated due to CC_SAMP_OVF and despite having bit 15 unmasked, FAULT pin is not activated.
What are we doing wrong?
Thank you!

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434 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hello Rebeca,

could you please confirm the reading from the FAULT3_STATUS register? Please share a hexadecimal number FAULT3_STATUS register. Please note, that the bits in the FAULT_MASK3 register are unmasked by default. Could you please share a hexadecimal number, you have written to the FAULT_MASK3 register? Have you masked all the other FAULT_MASK3 bits except the bit 15? 

JozefKozon_0-1684231531649.png

JozefKozon_1-1684231635587.png

With Best Regards,

Jozef

 

 

 

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442 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Good morning Rebeca,

have you activated the Coulomb counter by setting the I_MEAS_EN bit to 1 in the SYS_CFG1 register? Please reset the Coulomb counter if transited from sleep to normal mode. 

JozefKozon_0-1684215215925.png

Please check the FAULT3_STATUS register, if the Coulomb counter went to overflow. 

JozefKozon_1-1684215290957.png

With Best Regards,

Jozef

 

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