Dear Support-team,
We have below questions about USBPHYLDO of PF1510.
Please support us.
<Question 1>
USBPHY (default 3.3 V output) seems to be described as being enable / disable with USBPHYLDO bit,
In the datasheet, USBPHYLDO = '0' for both Enable and Disable.
*The datasheet of PF 1550 is also the same description.
Is Enable / Disable control possible? (Is it a typo)?
<Question 2>
If it is set to Disable, will the USBPHY output become 0 V?
Best Regards,
T.Sakamoto@Ryosan
Solved! Go to Solution.
Hi Tomohisa,
[Answer 1]
This is a typo, USBPHYLDO = ‘0’ is for Disabled and USBPHYLDO = ‘1’ should be for Enabled.
I reported this typo to the Apps team, I’ll be fixed for the next revision of the datasheet.
[Answer 2]
Correct, USBPHY LDO regulator can be 0V if USBPHYLDO bit is disabled (‘0’).
Have a great day,
Jose
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Dear Jose-san,
Thank you for your reply.
We understood your answers.
Thank you!
Best Regards,
Hi Tomohisa,
[Answer 1]
This is a typo, USBPHYLDO = ‘0’ is for Disabled and USBPHYLDO = ‘1’ should be for Enabled.
I reported this typo to the Apps team, I’ll be fixed for the next revision of the datasheet.
[Answer 2]
Correct, USBPHY LDO regulator can be 0V if USBPHYLDO bit is disabled (‘0’).
Have a great day,
Jose
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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