Hi Haby,
Fail-safe OTP_REGISTERS registers cannot be changed later during the INIT_FS phase.
From Main OTP_REGISTERS, only regulators behavior in case of TSD, VPRE and VBOOST slew rate parameters can be changed later as shown in the FS84/85 Datasheet rev. 3.1 and below.
So to answer your questions in detail:
1. No. The Watchdog mode (Simple or Challenger) cannot be changed later during the INIT_FS phase.
FS85 watchdog must be configured to "Challenger WD" by OTP (WD_SELECTION = 1) for ASIL C or D safety applications.
During the INIT_FS phase the MCU can configure the Watchdog monitoring using the FS_I_WD_CFG
register:
- Watchdog Error Counter Limit with WD_ERR_LIMIT[1:0] bits
- Watchdog Refresh Counter Limit with WD_RFR_LIMIT[1:0] bits
- Watchdog impact on RSTB and FS0B with WD_FS_IMPACT[1:0] bits
The Watchdog Window Period and Watchdog Window Duty Cycle can be changed not only during the INIT_FS phase, but also later during the Normal mode.
2. No. The Fault recovery strategy cannot be changed later during the INIT_FS phase.
If the FS85 is used in combination with NXP S32x 16nm MCU and the FCCU monitoring is enabled, the FS85 Fault Recovery feature should be enabled by OTP using FLT_RECOVERY_EN OTP bit to benefit from the MCU Fault recovery strategy.
3. No. Both Autoretry_infinite and Autoretry_en cannot be changed later during the INIT_FS phase.
When the Fault Error Counter reaches its maximum value, the FS85 goes to Deep Fail-Safe phase if it is activated by OTP.
A few more words about OTP configuration:
- It is system integrator's responsibility to define the OTP configuration desired for its safety application.
- Only A0 parts are non-programmed OTP configurations. They can be programmed using the KITFS85SKTEVM programming board (UM11183) or KITFS85FRDMEVM evaluation board (UM11157). However, this is only for debug and development to find/evaluate the optimal configuration. Final OTP programming for parts in production can be requested either from NXP or some distributors depending on the volume.
- There are several pre-programmed OTP configurations available as shown in the datasheet (Table 2).
Best regards,
Tomas
PS: If my answer helps to solve your question, please mark it as "Correct" or “Helpful”. Thank you.
Hi Haby,
Yes, NXP or selected distributors must do the OTP programming for parts in production. OTP programming by customers (typically using the KITFS85SKTEVM) is allowed only for engineering purpose during development to validate the OTP configuration.
As for your second question, I need to double check it with the design team, but it should be the same as the typical power up phase. When the ABIST1 is done, RSTB and PGOOD pins are released and the initialization of the device is opened for another new 256 ms.
Best regards,
Tomas
