NVT2008 Level translator, Output level issue.

[Ashfaaq]

Hi Team,

We are using NVT2008 as a level translator from 1.8V(Vref A) to 3.3V(Vref B) and vise versa. We have used the same design similar to application circuit. OE is given via 200k and also connected with VrefB and PU is given to Bn. There is proper 1.8V signal coming at An. But we are getting only 2.4V  at Bn. We have checked on multiple boards. 

Please help on this issue asap.

[diazmarin09]

Hello Ashfaaq,

I hope all is great with you. Thank you for using the NXP communities.

Your configuration seems correct to me. Could you please share your schematic for a better understanding?

What is the value of the pull ups resistors? Have you tried to decrease its value?

How many boards have you tested and failed?

Regards,
David

[Ashfaaq]

Hi @diazmarin09 ,

We have tested 5 boards, all has the same issue and we have tried by decreasing PU values from 10k to 1k, but still not much change in output level of Bn signals. 

And we have tried varying the 200K PU to OE.
    i) While increasing the value to 300K we can observe the Bn level changing to 2.6V from 2.4V
    ii) While decreasing the PU to 0E, we have observed the Vref A(1.8V) increasing to 2.1V when VrefB is applied.

Attaching the Schematics for your reference. Kindly help on this, since we have all the boards assembled, we need to close this on priority.

Regards,
Ashfaaq.

[diazmarin09]

Hello Ashfaaq,

I am pleased to contact you again. Thank you for contacting us.

Does your application require open-drain pins?

According to what voltage you will apply to the VREFA, VREFB, Ax and Bx pins, you need to choose correct pull-up resistors for required current for internal drivers. The current requirements depends also on required communication speed.

Please review the table above for the proper pull-up resistors.

The 200kOhm on the EN pin is required for low current flowing to the EN pin. I had one customer who connected the EN pin directly to VREFB and the NVT20xx didn't work, adding 200k pull-up resistor solved the issue.

Regards,

David 

[Ashfaaq]

Hi @diazmarin09 

Thanks for your valuable response.
We are using the NVT2008 for UART communication and we have a buffer(SN74LVC1G126) in between the level translator and my receiver. The current requirement of the buffer is 5uA. 

Initially we have not populated the PU resistors at An & Bn. As we are not getting the proper signal level at Bn we tried using PU and not at An (since VCCB - VCCA >1V)

We have tried isolating the buffer but still the output of Bn is not 3.3V.

We also referred the application note 

We have assembled our boards. Please help on this issue.

[diazmarin09]

Hello,

We highly recommend to connect Bn pins to VREFB through a pull-up resistor. Based on the table above, please connect them using a 1.5kΩ resistor.

The 200kOhm on the EN pin is required for low current flowing to the EN pin.

Could you please make sure that you are supplying the device properly? I mean at the VREFA/B pins.

Have you tried to place the capacitor as the configuration below? I mean, at the VREFB and EN pins.

Regards,

David 

[Ashfaaq]

Hi David,

I have tried by adding 0.1uF in VrefB and1.5K PU on the Bn lines, Still the Bn signals are not at 3.3V level. Please help with this. 

[diazmarin09]

Hello,

I am pleased to contact you again. Happy new year.

Please review the recommendation from our specialist below:

Can you ask the customer to disconnect EN pin from the circuit which controls the EN pin? Then connect EN pin to VREFB to always enable the level shifter. Does this modification fix the issue?

Regards,

David

[Ashfaaq]

Hi David,

Happy New Year!!

Please find our schematics. We are already connecting the En directly to VrefB .

[diazmarin09]

Hello Ashfaaq,

Please review the response from our specialist below:

If the device is set up correctly the you should see around 2.4V on EN and VREF2 pins. EN pin is used to enable all the channels, see the figure below.

If EN is at 2.4V and SCL1/SDA1 at 0V then the SW are on and SCL2/SDA2 are driving low. When SCL1/SDA1 goes up to around 1.8V, then the SW are off and SCL2/SDA2 pulled up to 3.3V via the external Rpu.

Can you ask the customer to check for this condition mentioned above?

Regards,

David 

[Ashfaaq]

Hi David,

Thanks for your response.

Yes, we are getting 2.4V at EN pin. Since EN and VrefB are connected, both are at 2.4V. 
But when 1.8V is applied to An, we are not getting 3.3V in Bn with the PU of 1.5k, instead we are getting amplitude of 1.8V - 2.1V in different ICs. By which it means, the SW is not completely turned off. 

Also, as mentioned earlier we are not using PU on the An Pins(since our VrefB - Vref A > 1V), PU is used only for Bn pins.

We would like to know why the SW is not completely turned off. 

[diazmarin09]

Hello Ashfaaq,

Thank you for using the NXP community. 

Please review the response from our specialist below:

Please check to make sure the pull up are present on the B side. When A side is driven by a push-pull driver (A side has not pull up) to 1.8V, the SW will be off if there is a 3.3V on the B side via the pull up. If there is no pull up on the B side, then the B side will be around 1.8V since the gate of the SW is at 2.4V (B side = 2.4V – Vth where Vth is the gate threshold).

Regards,

David