MMPF0100F0AEP Power-Up sequence

[calibronic]

Dear all

I am going to design my custom board based on i.MX6Q processor and "SABRE for Smart Devices Board" as reference design.
I have checked the SABRE Board's power supply page (Page19) , PMIC part number that is used is MMPF0100F0AEP. I checked the PMIC datasheet and it has pre-programmed with F0 configuration.
In the CPU datasheet( MCIMX6Q6AVT10AD) is recommended to VDD_SNVS_IN supply must be turned ON before any other power supply. It may be connected (shorted) with VDD_HIGH_IN before VDD_ARM_CAP, VDD_SOC_CAP but in SABRE Board VDD_ARM_CAP and VDD_SOC_CAP will turn on before VDD_HIGH_IN that is not make sense !

Does SABRE - SDB use the default "F0 "OTP setting ? If so, doesn't effect on Board boot sequence since VDD_ARM_CAP and VDD_SOC_CAP will turn on at sequence 2-3 and then VDD_HIGH_IN will tuen on at sequence 10 ?

Can I use MMPF0100F0AEP with F0 configuration without any programming for my custom Board ?

Please advice me about it

By the way, I have attached the picture that can shows the datasheet information and SABRE Board's power sequence table.

Thank you so much in advance

[calibronic]

Dear G.w. Sun 

Noted and thank you so much for your replying. 

Could you please answer above questions and clarify them for me?

[guoweisun]

Sorry that unclear answer to you!

Please review pf0100 datasheet page20 Fig6,the first regulator startup is VSNVS,not the SW1 your attached.

For your question:

1：Does SABRE - SDB use the default "F0 "OTP setting ? If so, doesn't effect on Board boot sequence since VDD_ARM_CAP and VDD_SOC_CAP will turn on at sequence 2-3 and then VDD_HIGH_IN will tuen on at sequence 10 ?

[gw]Yes,it used PF0100F0.

Can I use MMPF0100F0AEP with F0 configuration without any programming for my custom Board ?

Please advice me about it

[gw]Yes,please use the F0 version.

[calibronic]

Dear G.w.Sun

Thank you for your prompt response. 

I  have attached SABRE Platform for Smart Devices 's Page19. 

- Could you please explain why in Page 19  table (Power-up sequence ) VDD_HIGH_IN (sequence 10)  will turn on after VDD_ARM_CAP and VDD_SOC_CAP (sequence 1&2), whereas in i.MX6Q datasheet recommended that  VDD_HIGH_IN  must turn on before VDD_ARM_CAP and VDD_SOC_CAP ?

[guoweisun]

HI

 Yes,understand your questions,but after verify this EVB, this kind of configuration works well no any problem.

We suggest your refer to this EVB schematic if use PF0100 F0, but if you use discrete components instead of PMIC please follow I.MX datasheet description about this topic.

[calibronic]

Dear G.w.Sun

I really appreciate it. I have more question :

I have been checking the MCIMX6QP-SDB “i.MX6 SMART DEVICE SYSTEM” evk schematics. The power-up sequence of the Board is  exactly as the CPU datasheet . It is used PMIC with MMPF0100F9AZES part number. It is non-programmed PMIC. Since I haven't  access to socket programmer , Can I used this part number MMPF0100F9ANES which has F9 pre-programmed configuration instead of MMPF0100F9AZES ?

[guoweisun]

If you don't care about the device working temperature range,I think you can do that!

[calibronic]

Thank you so much dear G.w.Sun

[guoweisun]

Hi

Please get note that PF0100 generate PMIC_VSNVS on PIN43 which supply to I.MX PIN G11(vdd-snvs-in) at start up stage.