MMPF0100 - Power Up / Shutdown

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MMPF0100 - Power Up / Shutdown

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davidkearney
Contributor II

Hey, a couple of questions regarding the state machine of the PF0100.

On startup, if not using the VSNVS o/p, is it OK to power Vin and PWRON on at the same time? i.e. both powered off main board 3V6 rail. Will the Vin UVDET make sure that the IC powers up correctly without having to put in a delay between Vin and PWRON? I'd like to minimise the amount of GPIOs to the  PMIC so if I can just attach PWRON to the same 3V6 rail as Vin this would work great. Would this also be OK during shutdown?

Also, is it possible to use the I2C interface to put the IC into Standby / Sleep modes? This would remove the requirement for dedicated interface GPIO lines, which would also be handy if possible.

I'd like to get the IO design down to just the I2C bus and Pgood lines if possible! :smileyhappy:

Many Thanks,

Dave

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Yuri
NXP Employee
NXP Employee

Hello,

  In general, it is recommended to pull up PWRON to VSNVS.

Your idea to feed PWRON directly also is acceptable (for PMIC startup).

  As for I2C (only) using for sleep entering - I am afraid - this is impossible,

since sleep mode is entered when PWRON is de-asserted and SWxOMODE bit

is set. So, special standby signaling (via pin) from i.MX6 is needed.

Please look at Chapter 21 [Low-level Power Management (PM) Driver] of

“i.MX_Linux_Reference_Manual.pdf” in Linux documentation regarding low power

modes using.

 

http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0-LINUX-DOCS&Parent_nodeId=133769948107170617... 

Have a great day,
Yuri

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davidkearney
Contributor II

Thanks Yuri. I see, so I power Vin from my 3V6 input rail, let it bring VSNVS up to say 3V, and then power PWRON from this 3V? This makes sense as the 3V6 will have to be pretty much at it's correct level before the PWRON is asserted and the chip powers up. Is this logic correct?

I'm not using it with the IMX6, I'm using it with the Zynq Z7020 SoC from Xilinx with FPGA plus 2x Arm cores. Your AN4991 has been a good reference for this. It doesn't use any control from the processor for PWRON, Standby or Shutdown. I would like to do the same, except maybe have the Standby Line present, coming from the Zynq. So I'm just wondering is this Standby functionality available through I2C or I need the dedicated GPIO line to put the PMIC into  it's standby mode. This is obviously useful for Low Power.

Your feedback would be much appreciated.

Many Thanks,

Dave

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Yuri
NXP Employee
NXP Employee

Hello,

 

  It is possible to apply the AN4991 scheme - to supply both

Vin and PWRON from the same source. From section 6.4.2.1 (Turn on

events) of the PMIC DataSheet (MMPF0100, Rev. 17.0, 1/2017) :

 

  When PWRON is configured as an active high [is default] and PWRON

is high (pulled up to VSNVS) before VIN is valid, a VIN transition from

0.0 V to a voltage greater than UVDET is also a Turn-on event.

  As for low power modes, basically the PMIC PF0100 has user programmable

standby, sleep, and off modes. You may look at Figure 8 (State diagram)

of the PMIC DataSheet. The most simple way for standby is STANDBY pin

using. Other approach is programming SWxOMODE bits - but it requires
PWRON = 0 (not suitable for Your case).

http://www.nxp.com/assets/documents/data/en/data-sheets/MMPF0100.pdf 

Regards,

Yuri.

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