Hi,
Unfortunately, there is no reference design for MMPF0100 were SW4 is used as VTT and SW3 is hooked up to power DRAM, however, this is very easy to design since SW4 regulator can be used in a VTT tracking mode for DDR memory termination, in this mode, SW4 output voltage automatically tracks half of SW3A output voltage (which would be used to provide VCC for the DDR). VTT mode can be configured by use of VTT bit in the OTP_SW4_CONFIG register.
Have a great day,
Jose
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