In FS6513, FLT_ERR_2:0 is showing Max value(6) at Init

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In FS6513, FLT_ERR_2:0 is showing Max value(6) at Init

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vaibhav_sharma
Contributor III

The FLT_ERR_2:0 bits is showing 6(FEC is configured for threshold 6) at the start of the SBC_Init function(before any of the other command being sent).
So presently after initializing SPI & port drivers, SBC is being init, the 1st cmd is reading the Fault error counter's present value & it returns as 6 (Not 1, which is the default value). What can be the issue?

When am reading the FEC value & WD_ANSWER(For RSTB bit) & DIAG_SF_IOS(For RSTB_EXT) reg, at that time, both these reset bits are set which gets cleared later on.

Am unable to refresh the WD for the very 1st time, assuming it due to this FEC max. value reached, so please help with a solution!!!

Why did the FEC reached max. at startup only?

Thanks in advance.

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DennisZeng
NXP Employee
NXP Employee

Hi, Vaibhav 

If FS65 never go into Normal_WD phase after Power on, FCCU is not active and cannot increase FEC.

There are 256ms maximum window for Init phase, if FS65 is not WD refreshed during this time it will restart and FEC will be increased by 1.

Pls, monitor whether RSTB pin have cyclic low pulse and check the period. 

Br

Dennis

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vaibhav_sharma
Contributor III

Hi Dennis,

Thanks for the response.

I am using debug mode so WD refresh is also not required. The Reset pin(RSTB) shows multiple times reset(Max 3 low levels(resets) were captured on oscilloscope).

And as I mentioned, my code goes into reset state when I try to refresh WD for the very 1st time. Therefore it is in INIT_FS mode only; & in debug mode; & FEC is showing max.(6).

If I make the IO2:3 as NOT SAFETY CRITICAL then the code works fine, WD refreshes good. FEC starts with 1; becomes 0 also by good WD refreshes. So, how is FCCU making the difference, plz help!

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DennisZeng
NXP Employee
NXP Employee

Hi, Vaibhav 

Even in debug mode, a good WD can make FS65 go into Normal Mode.  FCCU function only active in Normal Mode.

So it should be FCCU trigger the fault\reset. pls. check with FCCU.

Br,

Dennis 

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4,448 Views
vaibhav_sharma
Contributor III

Hi Dennis,

Plz respond.

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4,449 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Vaibhav.

This is a strange phenomenon. The FLT_ERR_2:0 should be 1 by default if there are no faults after FS65 powering up. Only a fault can make the FLT_ERR increase by 1. 

 

Are you using the Debug mode? Can you read the diagnosis registers of the FS6513 to confirm there are no faults happening during power up?    

Best regards,

Tomas

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4,449 Views
vaibhav_sharma
Contributor III

Hi Tomas,

Thanks for responding.

The issue is resolved now. Yes, I am using debug mode. FEC starts with one. It was due to error reporting on IO2_3 pins of SBC.

But if any error is reported once, & doesn't get cleared. Will the FEC keep on incrementing?

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DennisZeng
NXP Employee
NXP Employee

Hi, 

If the error is reported once and even the corresponding register bit is not be cleared, the Fault error counter only increase by 1.

Br

Dennis 

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4,449 Views
vaibhav_sharma
Contributor III

Hi Dennis,

Thanks for the response.

I tried the code with IO_23_FS bit disabled(i.e., making it NOT SAFETY) then the code runs fine, & FEC starts with 1.

But when I enable it(Making it safety critical) then in SBC_Init function before sending any other SPI command, I am reading the value of FEC, it comes to be 6. In this case, when trying to send a WD refresh(good), debugger shows resets. IO_3 bit of IO_INPUT reg shows the value 1(Polarity of FCCU error detection is active high).

This is the only difference in my working & non working code. What can be the issue? How does it reach max. value of FEC(6)?

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DennisZeng
NXP Employee
NXP Employee

Hi, Vaibhav

Pls. confirm how many times FCCU fault happen. You can check IO2/IO3 and reset pin signal with scope during normal power up.

The only way to increase FEC to six is fault happen six times and not be cleared.  

Br

Dennis

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4,449 Views
vaibhav_sharma
Contributor III

Hi Dennis,

Thanks for the response.

The faults are from FCCU.

According to the SBC manual, "When IO_2:3 are used as safety inputs to monitor FCCU error outputs from the NXP MCU, the monitoring is active only when the fail-safe state machine is in 'normal WD' state and all the phases except the 'normal phase' are considered as an error."

 What does this mean? Because as I mentioned earlier, code is in INIT phase & FEC shows 6(When FCCU was enabled) & the above statement shows that monitoring is active only in normal WD phase.

So, how is it detecting the FCCU faults?

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DennisZeng
NXP Employee
NXP Employee

Hi, Vaibhav

FCCU function is active only when FS65 fail-state machine is in  "normal WD".   When FCCU fault happen in  "normal WD", FS65 fail-state machine will be reset and go to "INIT phase", meanwhile FEC will be add by 1.

If FCCU fault always exist, FS65 fail-state machine will cyclic restart until FEC increased to 6. 

So pls. monitor RSTB pin whether it have low pulse cyclically to confirm whether  fail-state machine is reset.  Because when fail-state machine is reset can trigger RSTB pin ouput low pulse with 10ms(Default)

Br

Dennis

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vaibhav_sharma
Contributor III

Hi Dennis,

Thanks for the response.

To be more clear, I have NOT provided even a single WD refresh, so there is no question of moving from INIT to Normal_WD phase. SBC is in INIT_FS mode & IO3 is high, showing error from FCCU, & this is my question; that how come FCCU is affecting FEC(as monitoring is only available in Normal_WD phase)?

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