In FS6500 SBC, need to close S1 switch while releasing FSxB pins?

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In FS6500 SBC, need to close S1 switch while releasing FSxB pins?

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vaibhav_sharma
Contributor III

The S1 switch between VPU_FS pin & Vpre shall be closed under which circumstances while releasing FSxB pins? As seen in the diagram of FS1B activation, switch S1 when closed, connects the Vpre & VPU_FS.

If I close the S1 switch from SF_OUTPUT_REQUEST register to release the FSxB pins, shall I again open S1 to request the assertion of the backup delay of FS1B???

Thanks in advance.

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vaibhav_sharma
Contributor III

Hi Allan,

Thanks for responding.

The pull up source for FS1B in both the cases is VPU only.

1. As you can see in my observation, the voltage at VPU pin is 5V throughout. So, can you tell me the significance of the S1 switch in detail(closed & open cases) as it connects the VPU to Vpre. What must be the voltage at the time of S1 closed & open? And why does it need to be closed when releasing FS pins?

2. Can I make the FS1B not to be pulled up by any source (VPU/VDDIO)? If yes, then How?

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AllanAn
NXP Employee
NXP Employee

Hi Vaibhav,

   

1. As you can see in my observation, the voltage at VPU pin is 5V throughout. So, can you tell me the significance of the S1 switch in detail(closed & open cases) as it connects the VPU to Vpre. What must be the voltage at the time of S1 closed & open? And why does it need to be closed when releasing FS pins?

Allan: when you use Vpu_fs as pull up source of FS1B, FS1B can be high only if there is  high voltage in Vpu_fs, FS1B Internal struct is OD/OC, FS1B need high voltage to go high, that 's the signification of S1 switch to be close. when S1 is open, voltage in Vpu_fs pin is ~0V. when S1 Close, Voltage in Vpu_fs is ~5.5V.  

2. Can I make the FS1B not to be pulled up by any source (VPU/VDDIO)? If yes, then How?

Allan: no, if no power up source, FS1B will be low at all time. please read FS65 application reference in the datasheet.  

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vaibhav_sharma
Contributor III

Hi Allan,

In addition to above questions, FYI, I've connected VPU_FS (pin no. 22) to the STB(Standby) pin of CAN transceiver to enable/disable it. So, my FS1B (pulled up to VPU) is controlling the external CAN transceiver.

As VPU is always giving high voltage (5V) {mentioned in previous comments} independent of S1 switch closure & at any stage of the init process of SBC; the CAN communication is OFF because the STB pin is active low pin.

Shall I use FS1B directly to STB pin of CAN transceiver? Or if I go with VPU pin only, then what could be the solution?

Thanks in advance!

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AllanAn
NXP Employee
NXP Employee

Hi Vaibhav,

    Vpu_fs is only used as pull up source of FS1B. please do not control others by Vpu_fs.

    The solution depends on the control logic that you want. For FS1B Function, In Power-up or wakeup from LPOFF Mode, FS1B is low, after release, FS1B is high, if you configure some faults that have an impact on FS0B/FS1B, FS1B will be asserted to low with a configured delay after FS0B asserted.   

    Hope this can help you.

Best Regards

Allan

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vaibhav_sharma
Contributor III

Plz answer to above mentioned queries!

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vaibhav_sharma
Contributor III

Hi Dennis,

Can you tell me what should be the voltages at VPU_FS & FS1B pins of FS6513. I am writing them here, which I've observed.

These voltages were measured on multimeter while the debugger was connected.

  1.        S1 switch closed but FS1B not released-

FS1B (pin no. 5)= 0.7V, VPU (pin no. 22)= 5V

 

  1.        S1 Switch closed & FS1B released-

Before release- FS1B= 0.7V, VPU= 5V

After release- FS1B= 5V, VPU= 5V

In both the cases, FS1B pin had approx 0V before ABIST2_FS1B. Is it correct?

The S1 switch was closed just before releasing FS0B & FS1B pins in the last step in the startup sequence.

On other board, I am getting FS1B pin as HIGH before running ABIST2_FS1B, & only after closing the S1 sw, it becomes low. Then, after releasing FS pins, it becomes high again.

What could be the possible reason for such sort of different behavior?

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AllanAn
NXP Employee
NXP Employee

Hi Vaibhav,

    1. In both the cases, FS1B pin had approx 0V before ABIST2_FS1B. Is it correct?

     Yes, it is right, FS1B cannot be released when ABIST2_FS1B is not conducted.

    2. On other board, I am getting FS1B pin as HIGH before running ABIST2_FS1B, & only after closing the S1 sw, it becomes low. Then, after releasing FS pins, it becomes high again.

    In this case, please check what's the pull up source of FS1B? VPU_FS internal switch(S1) to VPRE must be closed when power up or wake-up during INIT_FS mode, AS Suggested in Page 34 of AN5238(V7.0).

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vaibhav_sharma
Contributor III

Hi Allan,

Please respond!

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DennisZeng
NXP Employee
NXP Employee

Hi,

Yes, it needs to close S1 switch before release FS1B when FS1B is pulled up to VPu_FS.   

If you want to verify whether back up delay time is correct, you can open S1 to check this latent fault. Pls. check page 49 of FS65 datasheet for more detailed information.

Br

Dennis