1:FLT_ERR_CNT is incremented on a fault(31 different sources) but only the fault which had had its reactions for RSTB AND FSB0B activated.
Is my understanding correct that unless both signals are asserted my FLT_ERR_CNT doesn’t move towards the DFS?
When only one is asserted I could have the MCU reset but the counter frozen or I could have the system in fail-safe(independently of MCU) then back to Normal but the counter frozen. Is this correct?
[gw]See enter into DFS condition below, once error happened which lead to fault error counter increased to setting max value it will enter into DFS,no matter it trigger RSTB /FS0B same time or not :
-RSTB pin low during 8 s
- Or FLT_ERR_CNT[3:0] = FLT_E RR_ CNT_ LIMIT[1:0]
- Or VPRE > VPRE_O VP
- Or xxxTDFS _OTP = 1 & xxxTSD_ I
- Or VPRE < VPRE_ UV H for 5 ms in `Start V PRE ' state
2:
- Second case, when FS0B is asserted AND WD_ERR_CNT overflows then Fault error counter still can be incremented. So, the system goes the fail-safe then it is released back to Normal. So, when WD error happens along with other fault (i.e VLDO1 OV) then the counter is incremented, otherwise not?
[gw] if the error still exist the counter will always increment.