Can PTA5 be configured to pull LOW to reset FS26?

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Can PTA5 be configured to pull LOW to reset FS26?

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Allen_863
Contributor III

I'm using an S32K3X4EVB-T172. I tried configuring PTA5 as a DIO output and intended to pull it low using Dio_WriteChannel, but it remains high. However, configuring PTA0 and PTA1 using the same method allows me to successfully control the HIGH/LOW state.

Is this because PTA5 doesn't support GPIO control, or because FS26 is always outputting HIGH, so it can't be pulled low by the S32K3?

Configure PTA0/PTA1/PTA5 for GPIO control

PTA5.png

11.png

12.png

5.png

However, only PTA5 = RSTB doesn't pull low. Is this because FS26 is in a normal state, causing RSTB to go high?

9.png

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RafaR
NXP Employee
NXP Employee

Hello Allen_863

Good day!

On the S32K3X4EVB-T172, PTA5 is multiplexed as RSTB, which is the reset signal for the FS26 power management IC.

The FS26 expects RSTB to stay HIGH during normal operation to keep the system out of reset.

Even if you configure PTA5 as a GPIO in your software, the FS26 hardware will likely override or strongly pull it HIGH because it’s a critical safety/reset line.

The board design prioritizes FS26 control over MCU GPIO control for this pin.

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

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RafaR
NXP Employee
NXP Employee

Hello Allen_863

Good day!

On the S32K3X4EVB-T172, PTA5 is multiplexed as RSTB, which is the reset signal for the FS26 power management IC.

The FS26 expects RSTB to stay HIGH during normal operation to keep the system out of reset.

Even if you configure PTA5 as a GPIO in your software, the FS26 hardware will likely override or strongly pull it HIGH because it’s a critical safety/reset line.

The board design prioritizes FS26 control over MCU GPIO control for this pin.

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

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