Hi,
In the u-boot code, once after the post tests are done, u-boot will relocate itself to DDR and continue running from in_ram.
However after calling the relocate function it seems the code does not run from in_ram at all.
Inside the relocate function (in start.S), before the blr instruction to run from the new location in DDR, I purposely stop to dump out the new u-boot content in DDR and I can see it there.
How would I go about troubleshoot this problem?
We finally find out what seems to be the problem. When creating TLB for DDR, by default MAS2_M (memory coherency required) is set, and we could not run code at all from DDR. We tried to set to MAS2_I | MAS2_G and it is able to run.
Is this a bug in the processor?
Perhaps there's a problem with the memory timings, causing it to work for single word accesses but fail on burst reads when an entire cache line is accessed at once.