how to config the file "P10xx-P20xxRDB_P2010_init_sram.tcl"

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how to config the file "P10xx-P20xxRDB_P2010_init_sram.tcl"

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xuchen
Contributor II

Dear All:

Is there any reference for configure this document?

especially this part "MMU  initialization", for example:

# define 16MB  TLB1 entry 2: 0xFF000000 - 0xFFFFFFFF; for Local Bus, non cacheable

  reg ${CAM_GROUP}L2MMU_CAM2 = 0x70000FCAFC080000FF000000FF000001

Is there any documents can state this register ?

I am Looking forward to your reply !

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ufedor
NXP TechSupport
NXP TechSupport

Please refer to the 5.10.5.4.2 e500v2 Registers (Table 105: e500v2 TLB1 Registers (L2MMU_CAM0 through L2MMU_CAM15)) in the attached document.

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