can not read CCSRBAR space on custom P2020 board

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can not read CCSRBAR space on custom P2020 board

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yansongzhu
Contributor III

I have a custom P2020 board. I can connect it with USB TAP without any initial tcl file. I also can change and read the core registers. But I can not read the registers of CCSRBAR space, the contents of  these registers display "CCSProtocolPlugin : Error reading memory   cannot start SAP transaction" . Can you tell me what reasons could lead to this error?

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Pavel
NXP Employee
NXP Employee

Look at the Table 8 of the P2020 Hardware Specification:

https://www.nxp.com/webapp/Download?colCode=P2020EC

 

This pin requires a pull up with 1 kOhm to OVDD


Have a great day,
Pavel Chubakov

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Pavel
NXP Employee
NXP Employee

It looks like that CCSRBAR value is different for your reading.

Test your board using .tcl file for the P2020 board.

Is there problem for using .tcl file?

Use as example TCL files for the P2020 board from CodeWarrior 10.5.1. Draw attention on the TCL for using L2 cache as SRAM.

See attachment.


Have a great day,
Pavel Chubakov

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yansongzhu
Contributor III

It seems not the TCL file leads to this problem. Sometimes, after I have used the oscilloscope probe to touch the pull up resister of scan_mode pin, it will recovery and work normally. Can you explain this phenomenon?

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