A question came up about the HRESET_REQ pin on the P1022. We’re wondering what kind of output driver this is – is it an open drain? We’ve currently got it connected in parallel with our reset button, which has been working fine, but we’re worried that if it is driving high then we will short it to ground when we push the button. So far there’s been no damage, but I just want to make sure I don’t need to make a change on our board. I’m moving ahead with it designed how I have it, it seems to work fine, but I would love to double check my assumption.
Thanks,
Adam
Described connection is incorrect.
1) The HRESET_REQ_B is an actively driven output
2) The HRESET_REQ_B can't be used to drive HRESET_B directly because HRESET_REQ_B is deasserted immediately after HRESET_B assertion is detected. Resulting HRESET_B pulse violates requirement (25 us minimum) of the P1022 QorIQ Integrated Processor Hardware Specifications, Table 5. RESET initialization timing specifications.
It is recommended to handle the HRESET_REQ_B by a CPLD.
Have a great day,
Fedor
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