What is the functionality of the P2041 PCI Express Controller Core Clock Ratio Register (PEX_GCLK_RATIO)

[jean-paulsmeets]

In P2040RM PCI Express Controller Core Clock Ratio Register (PEX_GCLK_RATIO) it states:

The PCI Express controller core clock ratio register is used to program the ratio of the

actual PCI Express controller clock frequency to the default controller core frequency

( 333 MHz ). This is required only when a PCI Express controller clock frequency other

than the default 333 MHz has to be used.

     -     What is the exact functionality of this register ?

     -     What happens if this is set incorrectly (actual PCI Express controller clock is 375MHz, numerator is 16) ?

[r8070z]

Have a great day,

The PEX controller hardware requires for timing tuning in order to operate properly at given CCB/2 clock frequency. PEX_GCLK_RATIO register controls this tuning with 333MHz/16 granularities. So for given CCB frequency Fccb [MHz] we must write to PEX_GCLK_RATIO nearest integer of ((Fccb/2)/(333/16)). So for Fccb=375 we have to write 18.

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