Register settings for PCIe in endpoint mode on p1010

[mattiasforsblad]

We have a P1010RDB board that we run VxWorks on. Now I'm trying to configure PCIe #2 (X1) as a EP. I've changed the

DIP switch so that the controller starts in EP mode and connected two boards through an adapter cable. LTSSM shows L0

so the physical link is up. However the Root Complex board hangs (when trying to enumerate the EP). What other registers

needs to be set up for an EP configuration?

[mattiasforsblad · Accepted solution]

I'll answer to my own post for future reference.

When you have set up the PCIe controller to your whishes (inbound/outbound TAR-windows etc) you need to set the CFG_READY bit in the CRR register (0x4B0 @ PCI Express Extended Configuration Space) to enable the transport layer to answer configuration requests on the bus.