P1021 Management Bus Issue

[brahmamyelagatu]

Hi,

We've interfaced two Mavell PHY's (88E1112)  in P1021 Customized board using  MDIO,MDC bus .

We're able to Addressed the PHY's  using eTSEC1 MDIO memory-mapped registers. But we're unable to  Addressed using eTSEC2 MDIO memory-mapped registers.

Can anyone explain how  to address(read and write cycles) the PHY  using eTSEC2 MDIO memory-mapped registers.

Regards,

Brahmam.

[Bulat · Accepted solution]

If I understand you correctly, you are going to configure an external PHY via MDC, MDIO bus. In that case you have to use eTSEC1 MDIO memory-mapped registers, even if the PHY is connected to eTSEC2 or eTSEC3. This is because MDC and MDIO signals are TSEC1 controlled. Make sure that PHYs connected to the MDIO bus have different bus Addresses.

eTSEC2 MDIO memory-mapped registers should only be used to configure internal TBI PHY, in a way described in section 15.10.1.4 of the Ref Manual.

[brahmamyelagatu]

Hi Karymov,

Thanks for your info

Regards,

Brahmam