P1020RDB external irq (IRQ7) problem

[Safak28]

Hello,

I am working on Qoriq P1020 RDB custom board. In this board, a signal is connected to IRQ7 external interrupt. After I read the mpic.txt documentation in Linux and I added external IRQ in dts as follow. Then I called request_irq and connected a handler for this interrupt. It is successfully connected and interrupt is generated.

fgpio@0 {

#address-cells = <0x01>

#size-cells = <0x00>

cell-index = <0x00>

compatible = "...,..."

reg = <0x00 0x00>

interrupts = <7 2 0 0>

interrupt-parent <&mpic>

}

Here is my problem. This signal is always low and lots of interrupts are triggered. In Qoriq documentation (P1020RM) there is a register for reading external irq signal levels (PIC_ERQSR). I read this register as 0xfc000000 in Linux. Also I read in U-Boot console after power up and I get the same value. This means IRQ7 is always low after power up. On the other hand, I get 0xFFF00000 when I read this register in another OS.

Versions -> U-Boot: 2018.07, Linux: 4.15.7

Which configuration causes this problem?

Thank you.

[Safak28 · Accepted solution]

I get into more details about this problem. The problem is pointed in qoriq reference manual. You can use mpic.txt for configuration of qoriq p1020 external irq, but  the RM says there is a relation between some tdm, gpio and irq pins. I removed tdm enable code from the uboot. Finally the external signal register is low for irq7 and the problem solved.

[Oswalag]

Hello @Safak28 

Please refer below link to configure external interrupt.

https://community.nxp.com/t5/P-Series/How-to-configure-external-interrupt-IRQ2-in-P2040/m-p/797758

Thanks

[Safak28]

Thanks for your support.

I have completed all steps in the topic you mentioned. I can see the interrupt in /proc/interrupts file.

In my configuration, I didn't remove the PCIe relations of IRQ7. Qoriq spec mentions there is a relations between IRQ7 and PCIe INTD. I think the relation is defined in dts like below (bold section). Is it right? I removed this section and I will try again.

Thanks

/* controller at 0x9000 */
&pci0 {
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <16 2 0 0>;
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
>;
};
};