CS0 = 16-bit NOR boot flash
CS1 = 16-bit NAND flash
CS2 = unused
CS3 = 8 bit peripheral
Registers are:
IFC Controller Registers
CSPR0:0xEF000105 AMASK0:0xFF000000 CSOR0:0x0000E001
IFC_FTIM0:0x10020001
IFC_FTIM1:0x14001400
IFC_FTIM2:0x0118000E
IFC_FTIM3:0x00000000
CSPR1:0xFF800103 AMASK1:0xFFFF0000 CSOR1:0x85082105
IFC_FTIM0:0x04050404
IFC_FTIM1:0x011A090A
IFC_FTIM2:0x0120201E
IFC_FTIM3:0x00000000
CSPR2:0x00000000 AMASK2:0x00000000 CSOR2:0x0000000C
IFC_FTIM0:0x00000000
IFC_FTIM1:0x00000000
IFC_FTIM2:0x00000000
IFC_FTIM3:0x00000000
CSPR3:0xFFB00081 AMASK3:0xFFFF0000 CSOR3:0x01020000
IFC_FTIM0:0x10020401
IFC_FTIM1:0x07001E0E
IFC_FTIM2:0x0610181F
IFC_FTIM3:0x00000000
IFC_CCR: 0x07000000
writing a sequential value:

reading it back:

c755_bus is the lower 8 bits of the IFC_AD bus bit swapped.
I triggered the analyser on WAIT going low. The peripheral drives WAIT off the falling edge of IFC_LCLK @50Mhz