Is there a schematic anywhere for the P2020RDB?

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Is there a schematic anywhere for the P2020RDB?

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Contributor I

We are having a cold temperature (-20C) issue with our P2020 - DDR2 interface. I want to look at the reference design to see if we missed any series termination resistors and etc. I would also like to see the register settings for the board. The interesting thing is that some boards work and some don't. I found that is I take a power resistor and just heat the P2020 the board works down to -40C. I'm thinking that either a register delay setting isn't right or we have a signal integrity issue. The schematic and register settings would give me a place to start.

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Community Manager
This an automatic process.

We are marking this post as solved, due to the either low activity or any reply marked as correct.

If you have additional questions, please create a new post and reference to this closed post.

NXP Community!

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NXP TechSupport
NXP TechSupport

Hello,


Sorry, but the information you are requesting is treated as confidential info at this time and requires a signed NDA (Non-Disclosure Agreement). Naturally, we cannot discuss this with you in public anyway, this requires to be handled as a Service Request (SR). Be aware that to give you remote support through a SR, we will still need the confirmation of a Freescale employee that the NDA is in place. If you want to go this route, the next steps will be: If you have already signed a NDA agreement for this product, please contact the person who assisted you or create a SR and name us a Freescale person that can confirm this. If you have not signed an agreement, please contact your local Freescale Distributor Salesperson or FAE for assistance. For a listing of our distributors, refer to: http://www.freescale.com/webapp/sps/site/overview.jsp?code=DISTRIBUTORS

I have created SR 1-3666244271 on behalf of you for this request.

Have a great day,
Andrei

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NXP Employee
NXP Employee

Hi,

There is schematic for P2020RDB, you may refer to below thread for this:

for LS1020A/LS1021A are we able to get Schematic and Design layout files for CPU/DDR ?

For the DDR settings of P2020RDB, there is also examples in the initialization file in CW installation directory:

C:\Freescale\CW_PA_v10.4.0\PA\PA_Support\Initialization_Files\QorIQ_P2


Have a great day,
Lunmin

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