HOW to connect 4xDDR3 chip with p2040?

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HOW to connect 4xDDR3 chip with p2040?

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luoweiping
Contributor I

Hi,

I am design new project schematic by using P2040 and micron ddr3.

one DDR3 spec is 2Gb, 16bits, MICRON DDR3 part number is MT41J128M16JT-125.

and I find the P2020 reference design schematic. why the data bus lines are irregular and cross between p2020 and ddr2.

for example, DDR2_DQ13--->DQ0, DDR2_DQ14--->DQ1, DDR2_DQ8--->DQ2. etc.

I upload the reference schematic. please help me to analysis it.

Additionally, if you have the correct reference design shematic about p2040 and ddr3, please send it to me.

thanks.

ddr2.bmp

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r8070z
NXP TechSupport
NXP TechSupport


Have a great day,

The DDR controller is only master which writes and reads DDR SDRAM cells. SDRAM bit cell and byte cells just return what the DDR controller has written to it. So the DDR controller does not care which particular SDRAM cell keeps one of 8 bits his wrote because these cells under the same control (DQS and DQM). As result
1) It is allowed to swap the data connections at DDR2/DDR3 pins within a byte lane.
2) It is allowed to swap the whole byte lanes within a DDR2 & DDR3 device.
When swap the whole byte lanes takes in account that byte lane includes 8 data lines and also DQS and DQM. I.e. all these signal have to be swapped.

There is useful app note AN3940, “Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces”. You can find download link on the P2040 product summary page

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=P2040&fpsp=1&tab=Documentation_Tab

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luoweiping
Contributor I

OK, thanks for your reply.

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luoweiping
Contributor I

hi,

can you help me?

I am waiting for your reply on-line.

thanks.

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luoweiping
Contributor I

thank for your reply.

please help to review my design between DDR3 and p2040. if have any question please tell me.

the data bus line are:

P2040  --------->  DDR3

DDR_DQ0 ----> DQ0

DDR_DQ1 ----> DQ1

DDR_DQ2 ----> DQ2

DDR_DQ3 ----> DQ3

|

|

|

|

|

DDR_DQ15 ----> DQ15

ddr3.bmp

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r8070z
NXP TechSupport
NXP TechSupport

What I can see on your picture is correct connections. Your list "P2040  --------->  DDR3" coresponds to the picture and as result also is correct.

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