For ECC generation please look P5040 Reference Manual, Section 13.4.3.1.3 "Error correcting codes and the spare region"
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P5040 has the older eLBC NAND controller, which only supports 1-bit hardware ECC, so MLC is not supported unless you use software ECC or on-die ECC (either of which would require some driver modifications to work, and would not provide ECC protection when booting firmware from NAND). Our T-series chips (e.g. T1040, T2080, T4240) have the IFC NAND controller which supports 4, 8, 24, and 40-bit hardware ECC.
Hi Wood ,
Got it ,thanks a lot.
Also be aware that (unlike IFC) eLBC only supports page sizes of 512 or 2048 bytes.