Embedded floating-point operations largely comply with the IEEE-754 floating-point standard.
Software exception handling is required to achieve full IEEE 754-compliance because the IEEE floating-point exception model is not fully implemented in hardware.
Please refer to the PowerPC e500 Core Family Reference Manual, efdcmpeq Floating-Point Double-Precision Compare Equal:
"If the contents of rA or rB are Infinity, Denorm, or NaN, SPEFSCR[FINV] is set, and the FGH FXH, FG and FX bits are cleared. If floating-point invalid input exceptions are enabled, an interrupt is taken and the condition register is not updated. Otherwise, the comparison proceeds after treating NaNs, Infinities, and Denorms as normalized numbers, using their values of ‘e’ and ‘f’ directly."