We have a customer looking to establish communication on the T1040 and P1011 via PCIe. These boards will start up independently and either one could reset without resetting the other. They are looking for information on the behavior of the PCIe controller in the error conditions. Scenarios they are concerned with are:
If processor is in reset state or PCI controller is not initialized or disable, this processor does not have possibility for PCI communications. It will ignore all transaction or request from PCI bus.
Look at the following pages:
http://www.design-reuse.com/articles/15545/integrating-pci-express-ip-in-a-soc.html
http://unix.stackexchange.com/questions/73908/how-to-reset-cycle-power-to-a-pcie-device
http://unix.stackexchange.com/questions/29775/reset-a-pci-device-in-linux
Have a great day,
Pavel Chubakov
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