CCSRBAR after reset don't have default value

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CCSRBAR after reset don't have default value

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rscoelho
Contributor II

Hi,

We are designing a target board using p3041 CPU referring to the design of P3041DS-PC. But we have a little problem with CCSRBARH register after perform the core reset, the value is set to 0xF, so the P3041DS_init_sram.tcl cannot map entry for flash memory. We are using RCW Harded-Coded 1_0010 (16-bit NOR Flash...).


What would be the reason that this register is not set to its default value (0x0) after reset?


Thanks for any response.

Best regards.

--

Rafael

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rscoelho
Contributor II

As workaround for this problem, I made the follow steps:

  1. Defined RCW hard-coded.
  2. Turn on the board.
  3. Initialize connection via USB TAP.
  4. Make the Core reset #0 or pause execution thread.
  5. In Registers tab perform the reset and write at LCC->LCC_CCSRBARH
  6. In Register tab perform the write 1 at field C bits of LCC->LCC_CCSRAR register.
  7. In Register tab perform the reset and write the LCC->LCC_CCSRBARH.
  8. So, the CCSRBAR is changed to 0x0_FE000000.

This solved of alternatively way, but I would like to understand by what reason the CCSRBARH is set to 0xF after PORESET.

Thanks for any response.

--

Rafael

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Pavel
NXP TechSupport
NXP TechSupport

What happens if the P3041DS_init_sram is used?

Do you see the P3041 hanging?

Create service request if your problem is not solved.

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rscoelho
Contributor II

If the P3041DS_init_sram is used the TLB entry are not valid. I think, because the script is run for CCSRBAR equal to 0x0_FE000000.

The processor is not hang, but I can not access devices mapped by script (_init_ram, for example NOR flash).

Thanks in advance.

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Pavel
NXP TechSupport
NXP TechSupport

If the CCSRBARH is changed, the P3041 MMU configuration also should be changed.

The P3041DS_init_sram.tcl file configures the 16-Mbyte region of CCSR registers to address 0x0_FE000000.

If the P3041DS_init_sram.tcl does not produce processor hanging, the CCSRBARH register value on your board is 0x0.

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rscoelho
Contributor II

Hello Pavel,

What happens is that the CCSBARH is already set to 0xF just after PORESET. So, the CCSRBAR is defined to 0xF_FE000000.

Thanks in advance.

--

Rafael

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lunminliang
NXP Employee
NXP Employee

May I ask how did you read the CCSRBARH register value?

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rscoelho
Contributor II

I configured the RCW to (1_0010 hard-coded) and connected via USB TAP, after run Core Reset #0, so the PC is stopped at 0xFFFF_FFFC (boot vector) and then I can see the value (CCSRBARH).

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