P2040/P2041 Local Bus Specific FAQs

[#1]

Can you please give more details about 32 address signals for the eLBC implementation on P2040?

Below is a detailed explanation of 32 address signals for the eLBC implementation on P2040:

LAD[0:15] - these are multiplexed address/data signals that need to be externally latched using the LALE signal.

LA[16:31] - these are dedicated address signals.

LAD[0] is the most significant address signal and LA[31] is the least significant address signal.

Can the Local Bus FCM support two, 2GByte (16Gbit) NAND devices, if they are the appropriate page size (2K SLC)?

FCM can support two devices, each one is connected to a separate /CS.

[tetsukouno]

> LAD[0] is the most significant address signal and LA[31] is the least significant address signal.

I am working on P2020 design. Is above description the same for P2020?

(and I am wondering why most significant address signal is indexed as 0)

And can you clarify correspondence between LWE#0/LWE#1 and LAD[0:7]/LAD[8:15]?

[lunminliang]

Yes, it's the same for P2020. According to figure 12-33 in P2020RM.pdf LWE0 is for LAD[0:7].

[tetsukouno]

Thank you, Liang-san.